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devel / comp.arch / Re: Load/Store with auto-increment

SubjectAuthor
* Re: Load/Store with auto-incrementAnton Ertl
`- Re: Load/Store with auto-incrementScott Lurndal

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Re: Load/Store with auto-increment

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https://news.novabbs.org/devel/article-flat.php?id=32158&group=comp.arch#32158

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From: anton@mips.complang.tuwien.ac.at (Anton Ertl)
Newsgroups: comp.arch
Subject: Re: Load/Store with auto-increment
Date: Thu, 11 May 2023 14:20:15 GMT
Organization: Institut fuer Computersprachen, Technische Universitaet Wien
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 by: Anton Ertl - Thu, 11 May 2023 14:20 UTC

scott@slp53.sl.home (Scott Lurndal) writes:
>anton@mips.complang.tuwien.ac.at (Anton Ertl) writes:
>>scott@slp53.sl.home (Scott Lurndal) writes:
>>>In general (T32, A32 and A64) that's considered 'undefined' behavior.
>>
>>Ouch! See my sig.
>
>Sorry, I was imprecise. The term of art used in the documentation
>is "Unpredictable" behavior.
>
>e.g. in the LDR(register) description for the ARMv7m architecture:
>
>if Rn == '1111' then SEE LDR (literal);
>t = UInt(Rt); n = UInt(Rn); m = UInt(Rm);
>(shift_t, shift_n) = (SRType_LSL, UInt(imm2));
>if m IN {13,15} then UNPREDICTABLE;
>if t == 15 && InITBlock() && !LastInITBlock() then UNPREDICTABLE;

I'm don't think this is much better. Hyrum's law still applies. I
can only think of two reasons why this has not become a problem yet:

1) The actual implementations all behave in the same way. In that
case, the fact that the specification does not document that behaviour
means that the specification is bad.

2) The number of users of the interface is sufficiently small. For
ARMv7m I find that hard to believe. For ARMv8 it is more plausible,
because few people program that in assembly language (or write
compilers and such).

- anton
--
'Anyone trying for "industrial quality" ISA should avoid undefined behavior.'
Mitch Alsup, <c17fcd89-f024-40e7-a594-88a85ac10d20o@googlegroups.com>

Re: Load/Store with auto-increment

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From: scott@slp53.sl.home (Scott Lurndal)
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Subject: Re: Load/Store with auto-increment
Newsgroups: comp.arch
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 by: Scott Lurndal - Thu, 11 May 2023 15:22 UTC

anton@mips.complang.tuwien.ac.at (Anton Ertl) writes:
>scott@slp53.sl.home (Scott Lurndal) writes:
>>anton@mips.complang.tuwien.ac.at (Anton Ertl) writes:
>>>scott@slp53.sl.home (Scott Lurndal) writes:
>>>>In general (T32, A32 and A64) that's considered 'undefined' behavior.
>>>
>>>Ouch! See my sig.
>>
>>Sorry, I was imprecise. The term of art used in the documentation
>>is "Unpredictable" behavior.
>>
>>e.g. in the LDR(register) description for the ARMv7m architecture:
>>
>>if Rn == '1111' then SEE LDR (literal);
>>t = UInt(Rt); n = UInt(Rn); m = UInt(Rm);
>>(shift_t, shift_n) = (SRType_LSL, UInt(imm2));
>>if m IN {13,15} then UNPREDICTABLE;
>>if t == 15 && InITBlock() && !LastInITBlock() then UNPREDICTABLE;
>
>I'm don't think this is much better. Hyrum's law still applies. I
>can only think of two reasons why this has not become a problem yet:

In this case '13' refers to the stack pointer, and '15' refers
to the PC. Code should avoid using those when the target register
can be either.

Basically, the compilers will never emit instructions with
UNPREDICTABLE semantics.

ARMv8 also has a "CONSTRAINED UNPREDICTABLE" category where
the instruction semantics are constrained to one of a documented
set of options.

For example:

* If the memory access is not to Normal Inner Write-Back
or Outer Write-Back Cacheable memory, then it is
a CONSTRAINED UNPREDICTABLE choice of either of the following:

-- An unaligned access is performed meeting all of the semantics of the instruction.
-- An Alignment fault is generated.

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