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devel / comp.arch / Re: Concertina II... again?

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o Re: Concertina II... again?Quadibloc

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Re: Concertina II... again?

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Subject: Re: Concertina II... again?
From: jsavard@ecn.ab.ca (Quadibloc)
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 by: Quadibloc - Tue, 17 Oct 2023 17:27 UTC

On Sunday, March 12, 2023 at 6:31:39 PM UTC-6, MitchAlsup wrote:

> Would I be rude in asserting that I think blocks and block headers are a putting you
> "up sh!t creak without a paddle".

This had started me thinking. Earlier, I did post a reply noting how I _could_ manage
to convert the ISA to one with conventional variable-length instructions.

Basically, the feature of having immediate values of all lengths available for instructions
was one thing that tended to push me in the direction of using a block structure - in
addition to the desire to include features normally associated with VLIW architectures,
like explicitly indicating instructions that can or can't execute in parallel.

So rather than converting to variable-length instructions, I've just been holding off on
doing any more work on Concertina II until I can come up with something new that will
help; either a better variable-length instruction format, or a much simpler block structure.

John Savard

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