Rocksolid Light

Welcome to Rocksolid Light

mail  files  register  newsreader  groups  login

Message-ID:  

It is surely a great calamity for a human being to have no obsessions. -- Robert Bly


devel / comp.arch / HLLs, hardware transactional memory and atomicity [was Re: Memory dependency microbenchmark]

SubjectAuthor
* Memory dependency microbenchmarkAnton Ertl
+* Re: Memory dependency microbenchmarkEricP
|`* Re: Memory dependency microbenchmarkAnton Ertl
| `* Re: Memory dependency microbenchmarkEricP
|  `* Re: Memory dependency microbenchmarkChris M. Thomasson
|   `* Re: Memory dependency microbenchmarkEricP
|    +* Re: Memory dependency microbenchmarkMitchAlsup
|    |`* Re: Memory dependency microbenchmarkEricP
|    | `- Re: Memory dependency microbenchmarkMitchAlsup
|    `* Re: Memory dependency microbenchmarkChris M. Thomasson
|     `* Re: Memory dependency microbenchmarkMitchAlsup
|      `* Re: Memory dependency microbenchmarkChris M. Thomasson
|       `* Re: Memory dependency microbenchmarkMitchAlsup
|        `* Re: Memory dependency microbenchmarkChris M. Thomasson
|         `* Re: Memory dependency microbenchmarkKent Dickey
|          +- Re: Memory dependency microbenchmarkChris M. Thomasson
|          +* Re: Memory dependency microbenchmarkChris M. Thomasson
|          |+* Re: Memory dependency microbenchmarkMitchAlsup
|          ||`* Re: Memory dependency microbenchmarkChris M. Thomasson
|          || `* Re: Memory dependency microbenchmarkKent Dickey
|          ||  +* Re: Memory dependency microbenchmarkaph
|          ||  |+- Re: Memory dependency microbenchmarkMitchAlsup
|          ||  |`* Re: Memory dependency microbenchmarkChris M. Thomasson
|          ||  | `* Re: Memory dependency microbenchmarkaph
|          ||  |  +- Re: Memory dependency microbenchmarkChris M. Thomasson
|          ||  |  `* Re: Memory dependency microbenchmarkKent Dickey
|          ||  |   +- Re: Memory dependency microbenchmarkChris M. Thomasson
|          ||  |   +* Re: Memory dependency microbenchmarkMitchAlsup
|          ||  |   |`* Re: Memory dependency microbenchmarkChris M. Thomasson
|          ||  |   | `* Re: Memory dependency microbenchmarkChris M. Thomasson
|          ||  |   |  `* Re: Memory dependency microbenchmarkChris M. Thomasson
|          ||  |   |   +- Re: Memory dependency microbenchmarkChris M. Thomasson
|          ||  |   |   `* Re: Memory dependency microbenchmarkMitchAlsup
|          ||  |   |    `* Re: Memory dependency microbenchmarkChris M. Thomasson
|          ||  |   |     `- Re: Memory dependency microbenchmarkChris M. Thomasson
|          ||  |   +* Re: Memory dependency microbenchmarkaph
|          ||  |   |`* Re: Memory dependency microbenchmarkChris M. Thomasson
|          ||  |   | `* Re: Memory dependency microbenchmarkaph
|          ||  |   |  `- Re: Memory dependency microbenchmarkMitchAlsup
|          ||  |   `* Re: Memory dependency microbenchmarkStefan Monnier
|          ||  |    `* Re: Memory dependency microbenchmarkMitchAlsup
|          ||  |     +- Re: Memory dependency microbenchmarkChris M. Thomasson
|          ||  |     +* Re: Memory dependency microbenchmarkChris M. Thomasson
|          ||  |     |`* Re: Memory dependency microbenchmarkMitchAlsup
|          ||  |     | `* Re: Memory dependency microbenchmarkChris M. Thomasson
|          ||  |     |  `* Re: Memory dependency microbenchmarkaph
|          ||  |     |   +- Re: Memory dependency microbenchmarkChris M. Thomasson
|          ||  |     |   `- Re: Memory dependency microbenchmarkChris M. Thomasson
|          ||  |     +* Re: Memory dependency microbenchmarkScott Lurndal
|          ||  |     |`* Re: Memory dependency microbenchmarkMitchAlsup
|          ||  |     | `* Re: Memory dependency microbenchmarkChris M. Thomasson
|          ||  |     |  `* Re: Memory dependency microbenchmarkMitchAlsup
|          ||  |     |   `* Re: Memory dependency microbenchmarkChris M. Thomasson
|          ||  |     |    `* Re: Memory dependency microbenchmarkMitchAlsup
|          ||  |     |     `* Re: Memory dependency microbenchmarkChris M. Thomasson
|          ||  |     |      `* Re: Memory dependency microbenchmarkMitchAlsup
|          ||  |     |       `* Re: Memory dependency microbenchmarkChris M. Thomasson
|          ||  |     |        `* Re: Memory dependency microbenchmarkChris M. Thomasson
|          ||  |     |         `- Re: Memory dependency microbenchmarkChris M. Thomasson
|          ||  |     `- Re: Memory dependency microbenchmarkStefan Monnier
|          ||  `* Re: Memory dependency microbenchmarkEricP
|          ||   +* Re: Memory dependency microbenchmarkMitchAlsup
|          ||   |`* Re: Memory dependency microbenchmarkChris M. Thomasson
|          ||   | `* Re: Memory dependency microbenchmarkBranimir Maksimovic
|          ||   |  `- Re: Memory dependency microbenchmarkChris M. Thomasson
|          ||   `* Re: Memory dependency microbenchmarkPaul A. Clayton
|          ||    +* Re: Memory dependency microbenchmarkScott Lurndal
|          ||    |+* Re: Memory dependency microbenchmarkMitchAlsup
|          ||    ||`* Re: Memory dependency microbenchmarkEricP
|          ||    || `- Re: Memory dependency microbenchmarkMitchAlsup
|          ||    |`* Re: Memory dependency microbenchmarkPaul A. Clayton
|          ||    | `- Re: Memory dependency microbenchmarkChris M. Thomasson
|          ||    `* Re: Memory dependency microbenchmarkEricP
|          ||     +* Re: Memory dependency microbenchmarkaph
|          ||     |`* Re: Memory dependency microbenchmarkEricP
|          ||     | +* Re: Memory dependency microbenchmarkChris M. Thomasson
|          ||     | |`- Re: Memory dependency microbenchmarkChris M. Thomasson
|          ||     | `* Re: Memory dependency microbenchmarkaph
|          ||     |  +* Re: Memory dependency microbenchmarkMitchAlsup
|          ||     |  |+- Re: Memory dependency microbenchmarkChris M. Thomasson
|          ||     |  |`* Re: Memory dependency microbenchmarkEricP
|          ||     |  | +- Re: Memory dependency microbenchmarkMitchAlsup
|          ||     |  | +- Re: Memory dependency microbenchmarkChris M. Thomasson
|          ||     |  | `* Re: Memory dependency microbenchmarkChris M. Thomasson
|          ||     |  |  `* Re: Memory dependency microbenchmarkMitchAlsup
|          ||     |  |   `- Re: Memory dependency microbenchmarkChris M. Thomasson
|          ||     |  `* Re: Memory dependency microbenchmarkEricP
|          ||     |   `* Re: Memory dependency microbenchmarkaph
|          ||     |    +* Re: Memory dependency microbenchmarkChris M. Thomasson
|          ||     |    |`* Re: Memory dependency microbenchmarkaph
|          ||     |    | +* Re: Memory dependency microbenchmarkTerje Mathisen
|          ||     |    | |`- Re: Memory dependency microbenchmarkChris M. Thomasson
|          ||     |    | `* Re: Memory dependency microbenchmarkChris M. Thomasson
|          ||     |    |  `- Re: Memory dependency microbenchmarkChris M. Thomasson
|          ||     |    `- Re: Memory dependency microbenchmarkEricP
|          ||     `* Re: Memory dependency microbenchmarkPaul A. Clayton
|          ||      `- Re: Memory dependency microbenchmarkChris M. Thomasson
|          |`* weak consistency and the supercomputer attitude (was: Memory dependency microbenAnton Ertl
|          | +- Re: weak consistency and the supercomputer attitudeStefan Monnier
|          | +- Re: weak consistency and the supercomputer attitudeMitchAlsup
|          | `* Re: weak consistency and the supercomputer attitudePaul A. Clayton
|          `* Re: Memory dependency microbenchmarkMitchAlsup
+* Re: Memory dependency microbenchmarkChris M. Thomasson
+- Re: Memory dependency microbenchmarkMitchAlsup
+* Re: Memory dependency microbenchmarkAnton Ertl
`* Alder Lake results for the memory dependency microbenchmarkAnton Ertl

Pages:12345678
Re: Memory dependency microbenchmark

<7uZiN.102934$p%Mb.20050@fx15.iad>

  copy mid

https://news.novabbs.org/devel/article-flat.php?id=36387&group=comp.arch#36387

  copy link   Newsgroups: comp.arch
Path: i2pn2.org!i2pn.org!weretis.net!feeder8.news.weretis.net!newsreader4.netcologne.de!news.netcologne.de!peer02.ams1!peer.ams1.xlned.com!news.xlned.com!peer01.iad!feed-me.highwinds-media.com!news.highwinds-media.com!fx15.iad.POSTED!not-for-mail
X-newsreader: xrn 9.03-beta-14-64bit
Sender: scott@dragon.sl.home (Scott Lurndal)
From: scott@slp53.sl.home (Scott Lurndal)
Reply-To: slp53@pacbell.net
Subject: Re: Memory dependency microbenchmark
Newsgroups: comp.arch
References: <2023Nov3.101558@mips.complang.tuwien.ac.at> <uiu4t5$t4c2$2@dont-email.me> <uj3c29$1t9an$1@dont-email.me> <uj3d0a$1tb8u$1@dont-email.me> <ujpnba$28jgr$1@dont-email.me> <ujpni1$28jgr$2@dont-email.me> <6339b1f3d3f7e47364800bfe1dd96bf0@news.novabbs.com> <bQa8N.2234$PJoc.448@fx04.iad> <db4d79b4f418a5d73ec7c63bf691af31@news.novabbs.com> <7Pp8N.22587$yAie.21519@fx44.iad> <uju081$2v76e$9@dont-email.me> <umdobu$3cmi3$1@dont-email.me> <4a473cbc2740f141f5a620f61bf40379@news.novabbs.com>
Lines: 33
Message-ID: <7uZiN.102934$p%Mb.20050@fx15.iad>
X-Complaints-To: abuse@usenetserver.com
NNTP-Posting-Date: Wed, 27 Dec 2023 17:50:59 UTC
Organization: UsenetServer - www.usenetserver.com
Date: Wed, 27 Dec 2023 17:50:59 GMT
X-Received-Bytes: 2612
 by: Scott Lurndal - Wed, 27 Dec 2023 17:50 UTC

mitchalsup@aol.com (MitchAlsup) writes:
>Chris M. Thomasson wrote:
>
>> On 11/25/2023 3:33 PM, Chris M. Thomasson wrote:
>>> On 11/25/2023 9:05 AM, Scott Lurndal wrote:
>>>>
>>>>
>>>> Clearly 1000 processors beating on the same cache line is
>>>> something to be avoided.   There still seem to be a dearth
>>>> of programmers that understand multithreaded programming.
>>>
>>> 1000 processors requires a distributed setup wrt NUMA. For instance, an
>>> amortized multi-queue that knows about locality tends to work rather
>>> well. The queue is distributed out where its unlikely that two
>>> processors might contend on the same thing in the queue logic.
>
>> If a processor obtains some work from the "queue" API (FIFO is not
>> guaranteed here.... ;^o), its highly likely that it is fairly local
>> work, close to "it" wrt the calling processor, wrt the physical layout
>> of the arch...
>
>When you have 1000 processors, and the number of cycles it takes

If you have a 1000 processors, you craft your workload to avoid
synchronization contention to the greatest extent possible. Any
workload with 1000 threads accessing a single resource is
fundamentally broken.

As for 'transactions', the problem with them isn't really hardware
support, or the size or number of discreet elements in the transaction,
it's how to leverage that capability from the standard languages like C,
C++, Rust or Carbon. Nobody programs in assembler any more, even
on microprocessors.

Re: Memory dependency microbenchmark

<umi3vd$23n0$1@dont-email.me>

  copy mid

https://news.novabbs.org/devel/article-flat.php?id=36388&group=comp.arch#36388

  copy link   Newsgroups: comp.arch
Path: i2pn2.org!i2pn.org!eternal-september.org!feeder3.eternal-september.org!news.eternal-september.org!.POSTED!not-for-mail
From: chris.m.thomasson.1@gmail.com (Chris M. Thomasson)
Newsgroups: comp.arch
Subject: Re: Memory dependency microbenchmark
Date: Wed, 27 Dec 2023 13:12:12 -0800
Organization: A noiseless patient Spider
Lines: 39
Message-ID: <umi3vd$23n0$1@dont-email.me>
References: <2023Nov3.101558@mips.complang.tuwien.ac.at>
<82b3b3b710652e607dac6cec2064c90b@news.novabbs.com>
<uisdmn$gd4s$2@dont-email.me> <uiu4t5$t4c2$2@dont-email.me>
<uj3c29$1t9an$1@dont-email.me> <uj3d0a$1tb8u$1@dont-email.me>
<ujpnba$28jgr$1@dont-email.me> <ujpni1$28jgr$2@dont-email.me>
<6339b1f3d3f7e47364800bfe1dd96bf0@news.novabbs.com>
<bQa8N.2234$PJoc.448@fx04.iad>
<db4d79b4f418a5d73ec7c63bf691af31@news.novabbs.com>
<7Pp8N.22587$yAie.21519@fx44.iad> <uju081$2v76e$9@dont-email.me>
<umdobu$3cmi3$1@dont-email.me>
<4a473cbc2740f141f5a620f61bf40379@news.novabbs.com>
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8; format=flowed
Content-Transfer-Encoding: 8bit
Injection-Date: Wed, 27 Dec 2023 21:12:13 -0000 (UTC)
Injection-Info: dont-email.me; posting-host="c66b038f7399639f89b200903ece3f8f";
logging-data="69344"; mail-complaints-to="abuse@eternal-september.org"; posting-account="U2FsdGVkX1+9p2PrMzBe4r+GQLNYwIjqwoLYwou99DA="
User-Agent: Mozilla Thunderbird
Cancel-Lock: sha1:u8YACVmY6ciDySStvFZntWxg8YA=
In-Reply-To: <4a473cbc2740f141f5a620f61bf40379@news.novabbs.com>
Content-Language: en-US
 by: Chris M. Thomasson - Wed, 27 Dec 2023 21:12 UTC

On 12/27/2023 9:21 AM, MitchAlsup wrote:
> Chris M. Thomasson wrote:
>
>> On 11/25/2023 3:33 PM, Chris M. Thomasson wrote:
>>> On 11/25/2023 9:05 AM, Scott Lurndal wrote:
>>>>
>>>>
>>>> Clearly 1000 processors beating on the same cache line is
>>>> something to be avoided.   There still seem to be a dearth
>>>> of programmers that understand multithreaded programming.
>>>
>>> 1000 processors requires a distributed setup wrt NUMA. For instance,
>>> an amortized multi-queue that knows about locality tends to work
>>> rather well. The queue is distributed out where its unlikely that two
>>> processors might contend on the same thing in the queue logic.
>
>> If a processor obtains some work from the "queue" API (FIFO is not
>> guaranteed here.... ;^o), its highly likely that it is fairly local
>> work, close to "it" wrt the calling processor, wrt the physical layout
>> of the arch...
>
> When you have 1000 processors, and the number of cycles it takes
> to perform a synchronization is 100-cycles, you need the synchron-
> ization to hand off enough work so that the winner has enough
> cycles of computation before another synchronization to allow
> all other processors to obtain work.

Agreed. Hummmmm...... I think, the little test of my xchg based "queue",
thing, just might do that in and of itself. I just need to port it 100%
pure C++11 so everybody can give it a run, as of now it is coded up in a
Relacy unit test:

https://groups.google.com/g/comp.arch/c/MarXjOpSmRM

>
>> Hummm, I need to start another thread on something related.

Re: Memory dependency microbenchmark

<umi43m$23n0$2@dont-email.me>

  copy mid

https://news.novabbs.org/devel/article-flat.php?id=36389&group=comp.arch#36389

  copy link   Newsgroups: comp.arch
Path: i2pn2.org!i2pn.org!eternal-september.org!feeder3.eternal-september.org!news.eternal-september.org!.POSTED!not-for-mail
From: chris.m.thomasson.1@gmail.com (Chris M. Thomasson)
Newsgroups: comp.arch
Subject: Re: Memory dependency microbenchmark
Date: Wed, 27 Dec 2023 13:14:29 -0800
Organization: A noiseless patient Spider
Lines: 46
Message-ID: <umi43m$23n0$2@dont-email.me>
References: <2023Nov3.101558@mips.complang.tuwien.ac.at>
<82b3b3b710652e607dac6cec2064c90b@news.novabbs.com>
<uisdmn$gd4s$2@dont-email.me> <uiu4t5$t4c2$2@dont-email.me>
<uj3c29$1t9an$1@dont-email.me> <uj3d0a$1tb8u$1@dont-email.me>
<ujpnba$28jgr$1@dont-email.me> <ujpni1$28jgr$2@dont-email.me>
<6339b1f3d3f7e47364800bfe1dd96bf0@news.novabbs.com>
<bQa8N.2234$PJoc.448@fx04.iad>
<db4d79b4f418a5d73ec7c63bf691af31@news.novabbs.com>
<7Pp8N.22587$yAie.21519@fx44.iad> <uju081$2v76e$9@dont-email.me>
<umdobu$3cmi3$1@dont-email.me>
<4a473cbc2740f141f5a620f61bf40379@news.novabbs.com>
<umi3vd$23n0$1@dont-email.me>
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8; format=flowed
Content-Transfer-Encoding: 8bit
Injection-Date: Wed, 27 Dec 2023 21:14:30 -0000 (UTC)
Injection-Info: dont-email.me; posting-host="c66b038f7399639f89b200903ece3f8f";
logging-data="69344"; mail-complaints-to="abuse@eternal-september.org"; posting-account="U2FsdGVkX1/6fFWz2FeeSqXlWUwjLX7W6SmIdK//4jE="
User-Agent: Mozilla Thunderbird
Cancel-Lock: sha1:U9FCkOdxHpHzYg7oNs+dtFcJ9HI=
Content-Language: en-US
In-Reply-To: <umi3vd$23n0$1@dont-email.me>
 by: Chris M. Thomasson - Wed, 27 Dec 2023 21:14 UTC

On 12/27/2023 1:12 PM, Chris M. Thomasson wrote:
> On 12/27/2023 9:21 AM, MitchAlsup wrote:
>> Chris M. Thomasson wrote:
>>
>>> On 11/25/2023 3:33 PM, Chris M. Thomasson wrote:
>>>> On 11/25/2023 9:05 AM, Scott Lurndal wrote:
>>>>>
>>>>>
>>>>> Clearly 1000 processors beating on the same cache line is
>>>>> something to be avoided.   There still seem to be a dearth
>>>>> of programmers that understand multithreaded programming.
>>>>
>>>> 1000 processors requires a distributed setup wrt NUMA. For instance,
>>>> an amortized multi-queue that knows about locality tends to work
>>>> rather well. The queue is distributed out where its unlikely that
>>>> two processors might contend on the same thing in the queue logic.
>>
>>> If a processor obtains some work from the "queue" API (FIFO is not
>>> guaranteed here.... ;^o), its highly likely that it is fairly local
>>> work, close to "it" wrt the calling processor, wrt the physical
>>> layout of the arch...
>>
>> When you have 1000 processors, and the number of cycles it takes
>> to perform a synchronization is 100-cycles, you need the synchron-
>> ization to hand off enough work so that the winner has enough
>> cycles of computation before another synchronization to allow
>> all other processors to obtain work.
>
> Agreed. Hummmmm...... I think, the little test of my xchg based "queue",
> thing, just might do that in and of itself. I just need to port it 100%
> pure C++11 so everybody can give it a run, as of now it is coded up in a
> Relacy unit test:
>
> https://groups.google.com/g/comp.arch/c/MarXjOpSmRM

When you get some free time to burn, take notice of how it can detect
local work vs foreign work...

>
>
>
>>
>>> Hummm, I need to start another thread on something related.
>

HLLs, hardware transactional memory and atomicity [was Re: Memory dependency microbenchmark]

<urg470$215g3$2@dont-email.me>

  copy mid

https://news.novabbs.org/devel/article-flat.php?id=37709&group=comp.arch#37709

  copy link   Newsgroups: comp.arch
Path: i2pn2.org!i2pn.org!news.chmurka.net!eternal-september.org!feeder3.eternal-september.org!news.eternal-september.org!.POSTED!not-for-mail
From: paaronclayton@gmail.com (Paul A. Clayton)
Newsgroups: comp.arch
Subject: HLLs, hardware transactional memory and atomicity [was Re: Memory
dependency microbenchmark]
Date: Fri, 23 Feb 2024 17:38:15 -0500
Organization: A noiseless patient Spider
Lines: 71
Message-ID: <urg470$215g3$2@dont-email.me>
References: <2023Nov3.101558@mips.complang.tuwien.ac.at>
<uiu4t5$t4c2$2@dont-email.me> <uj3c29$1t9an$1@dont-email.me>
<uj3d0a$1tb8u$1@dont-email.me> <ujpnba$28jgr$1@dont-email.me>
<ujpni1$28jgr$2@dont-email.me>
<6339b1f3d3f7e47364800bfe1dd96bf0@news.novabbs.com>
<bQa8N.2234$PJoc.448@fx04.iad>
<db4d79b4f418a5d73ec7c63bf691af31@news.novabbs.com>
<7Pp8N.22587$yAie.21519@fx44.iad> <uju081$2v76e$9@dont-email.me>
<umdobu$3cmi3$1@dont-email.me>
<4a473cbc2740f141f5a620f61bf40379@news.novabbs.com>
<7uZiN.102934$p%Mb.20050@fx15.iad>
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8; format=flowed
Content-Transfer-Encoding: 8bit
Injection-Date: Sun, 25 Feb 2024 19:25:20 -0000 (UTC)
Injection-Info: dont-email.me; posting-host="c2dd64b59c6b4553f800b1a2df9a3a39";
logging-data="2135555"; mail-complaints-to="abuse@eternal-september.org"; posting-account="U2FsdGVkX18pBHOG/D4+45WwKhvmLuFyRozs/IZ+bpM="
User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101
Thunderbird/91.0
Cancel-Lock: sha1:L07uZzd6x2Za3bR/UWGrGApFdUM=
In-Reply-To: <7uZiN.102934$p%Mb.20050@fx15.iad>
 by: Paul A. Clayton - Fri, 23 Feb 2024 22:38 UTC

On 12/27/23 12:50 PM, Scott Lurndal wrote:
[snip]
> As for 'transactions', the problem with them isn't really hardware
> support, or the size or number of discreet elements in the transaction,
> it's how to leverage that capability from the standard languages like C,
> C++, Rust or Carbon. Nobody programs in assembler any more, even
> on microprocessors.

Translating locked critical sections into transactions would seem
likely to be possible.

*If* _all_ uses of a lock can _always_ use the transaction
mechanism, the lock mechanism can be removed (theoretically).
Otherwise, the lock would have to be checked at the beginning of
each transaction (adding it to the read set) so that a thread not
using the transaction mechanism (because it does not work) can
still be atomic by using the lock.

A higher level language might provide named critical sections (for
single-structure guarding, a reference to the structure might be a
name) where the compiler might implement the name-based guarding
with locking or transactions (or both).

An even higher level language might have the compiler do *all* the
hard analysis of removing data races. This is "merely" a form of
compiler autoparallelization.☺ (I do not see this happening any
time soon. I would also argue that such is inefficient in that it
will often be rediscovering information that was available or more
easily discovered in an earlier phase of software development.)

There are probably other language designs for addressing data
races. For memory management, Rust (from the little I have read)
introduced an interface that avoids the correctness issues of
manual memory management while avoiding some of the issues with
traditional garbage collection (including reference counting). I
have read even less about Rust's parallelism support, but I
suspect such was both integrated with the memory management (one
would expect a new language to have more elegance) and
philosophically similar (emphasizing correctness and execution
efficiency).

Versioning seems to present opportunities for parallelism beyond
what is provided by simply implemented atomicity (exploiting an
"as if" rule), so language development might be advised to account
for that possibility.

There are also cases where strict ordering is not important; fire-
and-forget atomics are a small-scale example. There might be a
clever interface that distinguishes such without being a burden to
the programmer; not using the returned value (locally) would seem
to allow the compiler to translate to a fire-and-forget, but that
_feels_ lacking as an interface. (Strict ordering is a mechanism
to provide data model consistency; data model consistency does not
_require_ strict ordering. Of course, reasoning about a
communication pattern becomes problematically difficult as
complexity increases.)

(There may also be cases where a data-dependent condition might be
needed rather than the data itself. A debit card transaction does
not care so much about the account balance but whether the balance
is sufficient to cover the transaction. For a single bound value,
a remote atomic add conditional on the bound might be practical to
implement in hardware (a biased representation could have this
value as zero); I am skeptical that such would be worthwhile.)

I am not sure how speculative multithreading would fit here.

Even more extreme, support for approximate (and stochastic)
computing might be desirable.

Blah, blah, blah.☹

Pages:12345678
server_pubkey.txt

rocksolid light 0.9.8
clearnet tor