On Wednesday, August 9, 2023 at 9:05:05 PM UTC-5, Brian Fox wrote:
> On Wednesday, August 9, 2023 at 8:59:22 PM UTC-4, Lorem Ipsum wrote:
>
> > My point is that virtually no one will read your vocabulary or care about what specific details make up
> > *your* definition of "stack machine".
> It's not my definition now. Koopman's name, "Multiple stack machine" is what I will
> use from now on.
> > I think you are getting closer to the truth.
> Well there, see. We can agree on something.
>
> I am looking for a slightly bigger sample size before making up
> my mind on this.
>
> Anyone else want to play in this mud?

Ugh,
> Anyone else want to play in this mud?

My preference is "zero-operand stack machine" as it usually implies separate data and return stacks.
There is a more general perspective, wherein I have used the term: "eleven memories of computer architecture"
And is best visited from the viewpoint of writing interpreters for various ISAs:
Given a given technology era, how are the various implementation (micro-architecture) mapped into a emulation memory space?
So C maps data and control temporaries into a single memory stack (a section of memory holding those items).
Forth uses two sections of memory. Then there are other "memory" that are mapped for the purposes of ISA emulation.
The register file, floating-point stack, micro-code memory, byte code dispatch table, locals, etc.

On Wednesday, 9 August 2023 at 14:54:10 UTC+1, Brian Fox wrote:
> With the discussion around whether a "Forth CPU" is a real thing I
> wondered if it would be worthwhile calling a [data stack/return stack] architecture a "Moore Architecture" to allow smoother conversation.
>
> Was Chuck the first person to organize a computer around two stacks
> with these intended functions?
>
> If not then to whom do we ascribe this architecture?

Have you considered the SECD machine ?
Although the letters are meant to stand for registers, they point to stacks
( except the environment which was usually as assoc array )

On Thursday, August 10, 2023 at 4:05:05 AM UTC+2, Brian Fox wrote:
> On Wednesday, August 9, 2023 at 8:59:22 PM UTC-4, Lorem Ipsum wrote:
>
> > My point is that virtually no one will read your vocabulary or care about what specific details make up
> > *your* definition of "stack machine".
> It's not my definition now. Koopman's name, "Multiple stack machine" is what I will
> use from now on.
> > I think you are getting closer to the truth.
> Well there, see. We can agree on something.
>
> I am looking for a slightly bigger sample size before making up
> my mind on this.
>
> Anyone else want to play in this mud?
You need only one stack - but two stack pointers. 4tH has one stack, but two stack pointers. If they collide your stack is full.

Hans Bezemer

On 10/08/2023 07:13, Jurgen Pitaske wrote:

<snip>

> What a wonderful idea to call it Moore Architecture.

Yes, I agree. We can argue whether or not Chuck was first to do this,
that, or the other, but Novix, RTX, PTSC1000, and many subsequent FPGA
implementations are surely worthy of an eponym?

--
Cheers
Clive

On Thursday, August 10, 2023 at 6:53:57 PM UTC-4, Clive Arthur wrote:
> On 10/08/2023 07:13, Jurgen Pitaske wrote:
>
> <snip>
> > What a wonderful idea to call it Moore Architecture.
> Yes, I agree. We can argue whether or not Chuck was first to do this,
> that, or the other, but Novix, RTX, PTSC1000, and many subsequent FPGA
> implementations are surely worthy of an eponym?

Uh, I'm not sure what you are trying to include in your list. I believe the names are intended to specify some particular details in the structure of the CPU. If that is, in fact, the case, then we will need a bunch of names. Look at Hans' post!

I can't see where there is any particular need for such names. But then, I've seen discussions go on for quite some time in c.l.f over much Moore trivial details. ;-)

--

Rick C.

-+- Get 1,000 miles of free Supercharging
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On 8/9/2023 1:54 PM, Brian Fox wrote:
> On Wednesday, August 9, 2023 at 12:01:00 PM UTC-4, Lorem Ipsum wrote:
>
>>
>> I know HP made minicomputers with two stacks.
>
> This is interesting.
> I missed this statement earlier.
> Do you remember an HP model number?
HP 3000

On Friday, August 11, 2023 at 11:41:13 AM UTC-4, Buzz McCool wrote:

> HP 3000

Thank you.

I just did some reading in this pdf manual and some other sites.

http://bitsavers.org/pdf/hp/3000/hp3000/5952-4431_HP3000_Summary_Description_Feb73.pdf

I think HP3000 like B5000 used the same stack for all purposes however I cannot seem
to find hard evidence of that. It seems the entire thing was programmed
at the low level in something called SPL which looks very much like Pascal/Algol.
I cannot find a document about Assembly Language on the HP3000.

The instruction set has a Procedure call and a Sub-routine call but I cannot find info
on what transpires in the CPU when they are executed.

On 12/08/2023 4:37 am, Brian Fox wrote:
> On Friday, August 11, 2023 at 11:41:13 AM UTC-4, Buzz McCool wrote:
>
>> HP 3000
>
> Thank you.
>
> I just did some reading in this pdf manual and some other sites.
>
> http://bitsavers.org/pdf/hp/3000/hp3000/5952-4431_HP3000_Summary_Description_Feb73.pdf
>
> I think HP3000 like B5000 used the same stack for all purposes however I cannot seem
> to find hard evidence of that. It seems the entire thing was programmed
> at the low level in something called SPL which looks very much like Pascal/Algol.
> I cannot find a document about Assembly Language on the HP3000.
>
> The instruction set has a Procedure call and a Sub-routine call but I cannot find info
> on what transpires in the CPU when they are executed.

If the end use of a stack-based processor was a register-based language,
what was the point? Elizabeth suggested users found it more convenient
to run a PolyForth port on the GA144 than program it natively. Not sure
if a dig but raises the question of creating something simply because one
can. That it has become feasible to 'Build your own CPU' (or SBC, or
Forth, or Standard) is no justification to do it. Hugh relates Testra
was under competitive pressure to create their chip. As excuses go it's
at least plausible.

On Friday, August 11, 2023 at 10:55:22 PM UTC-4, dxforth wrote:
> On 12/08/2023 4:37 am, Brian Fox wrote:
> > On Friday, August 11, 2023 at 11:41:13 AM UTC-4, Buzz McCool wrote:
> >
> >> HP 3000
> >
> > Thank you.
> >
> > I just did some reading in this pdf manual and some other sites.
> >
> > http://bitsavers.org/pdf/hp/3000/hp3000/5952-4431_HP3000_Summary_Description_Feb73.pdf
> >
> > I think HP3000 like B5000 used the same stack for all purposes however I cannot seem
> > to find hard evidence of that. It seems the entire thing was programmed
> > at the low level in something called SPL which looks very much like Pascal/Algol.
> > I cannot find a document about Assembly Language on the HP3000.
> >
> > The instruction set has a Procedure call and a Sub-routine call but I cannot find info
> > on what transpires in the CPU when they are executed.
> If the end use of a stack-based processor was a register-based language,
> what was the point? Elizabeth suggested users found it more convenient
> to run a PolyForth port on the GA144 than program it natively. Not sure
> if a dig but raises the question of creating something simply because one
> can. That it has become feasible to 'Build your own CPU' (or SBC, or
> Forth, or Standard) is no justification to do it. Hugh relates Testra
> was under competitive pressure to create their chip. As excuses go it's
> at least plausible.

Why would anyone want to program even a stack processor in assembly language? While the GA144 may seem similar to Forth, it is actually very different. Like many assembly lanugages, it has many quirks at the assembly level that are easy to forget about and/or screw up. This is one of several reasons why I eschew the idea that a stack processor should be called a Forth processor.

This is also why I would point out that the Testra processor was not a Forth processor. If I'm not mistaken, Hugh is happy to point out that the CPU was very hard to program at the assembly level and his compiler was very important to the chip being useful.

--

Rick C.

-++ Get 1,000 miles of free Supercharging
-++ Tesla referral code - https://ts.la/richard11209

In article <3fd96aca-8f9b-4c2e-9f38-2635b06f7cd2n@googlegroups.com>,
Brian Fox <brian.fox@brianfox.ca> wrote:
>On Friday, August 11, 2023 at 11:41:13 AM UTC-4, Buzz McCool wrote:
>
>> HP 3000
>
>Thank you.
>
>I just did some reading in this pdf manual and some other sites.
>
>http://bitsavers.org/pdf/hp/3000/hp3000/5952-4431_HP3000_Summary_Description_Feb73.pdf
>
>I think HP3000 like B5000 used the same stack for all purposes however I
>cannot seem
>to find hard evidence of that. It seems the entire thing was programmed
>at the low level in something called SPL which looks very much like
>Pascal/Algol.
>I cannot find a document about Assembly Language on the HP3000.
>
>The instruction set has a Procedure call and a Sub-routine call but I
>cannot find info
>on what transpires in the CPU when they are executed.

It can be claimed that the pdp16 where each register supports autodecrement
/ autoincrement has dual (or more) stacks. The current argument is
rather moot.
Groetjes Albert
>
>
--
Don't praise the day before the evening. One swallow doesn't make spring.
You must not say "hey" before you have crossed the bridge. Don't sell the
hide of the bear until you shot it. Better one bird in the hand than ten in
the air. First gain is a cat spinning. - the Wise from Antrim -

On 12/08/2023 4:04 pm, Lorem Ipsum wrote:
> On Friday, August 11, 2023 at 10:55:22 PM UTC-4, dxforth wrote:
>> On 12/08/2023 4:37 am, Brian Fox wrote:
>>> On Friday, August 11, 2023 at 11:41:13 AM UTC-4, Buzz McCool wrote:
>>>
>>>> HP 3000
>>>
>>> Thank you.
>>>
>>> I just did some reading in this pdf manual and some other sites.
>>>
>>> http://bitsavers.org/pdf/hp/3000/hp3000/5952-4431_HP3000_Summary_Description_Feb73.pdf
>>>
>>> I think HP3000 like B5000 used the same stack for all purposes however I cannot seem
>>> to find hard evidence of that. It seems the entire thing was programmed
>>> at the low level in something called SPL which looks very much like Pascal/Algol.
>>> I cannot find a document about Assembly Language on the HP3000.
>>>
>>> The instruction set has a Procedure call and a Sub-routine call but I cannot find info
>>> on what transpires in the CPU when they are executed.
>> If the end use of a stack-based processor was a register-based language,
>> what was the point? Elizabeth suggested users found it more convenient
>> to run a PolyForth port on the GA144 than program it natively. Not sure
>> if a dig but raises the question of creating something simply because one
>> can. That it has become feasible to 'Build your own CPU' (or SBC, or
>> Forth, or Standard) is no justification to do it. Hugh relates Testra
>> was under competitive pressure to create their chip. As excuses go it's
>> at least plausible.
>
> Why would anyone want to program even a stack processor in assembly language? While the GA144 may seem similar to Forth, it is actually very different. Like many assembly lanugages, it has many quirks at the assembly level that are easy to forget about and/or screw up. This is one of several reasons why I eschew the idea that a stack processor should be called a Forth processor.
>
> This is also why I would point out that the Testra processor was not a Forth processor. If I'm not mistaken, Hugh is happy to point out that the CPU was very hard to program at the assembly level and his compiler was very important to the chip being useful.
>

So a mismatch between what was wanted and what was available. Not a great
recipe for performance but apparently good enough for their purposes.

On Saturday, August 12, 2023 at 5:02:01 AM UTC-4, dxforth wrote:
> On 12/08/2023 4:04 pm, Lorem Ipsum wrote:
> > On Friday, August 11, 2023 at 10:55:22 PM UTC-4, dxforth wrote:
> >> On 12/08/2023 4:37 am, Brian Fox wrote:
> >>> On Friday, August 11, 2023 at 11:41:13 AM UTC-4, Buzz McCool wrote:
> >>>
> >>>> HP 3000
> >>>
> >>> Thank you.
> >>>
> >>> I just did some reading in this pdf manual and some other sites.
> >>>
> >>> http://bitsavers.org/pdf/hp/3000/hp3000/5952-4431_HP3000_Summary_Description_Feb73.pdf
> >>>
> >>> I think HP3000 like B5000 used the same stack for all purposes however I cannot seem
> >>> to find hard evidence of that. It seems the entire thing was programmed
> >>> at the low level in something called SPL which looks very much like Pascal/Algol.
> >>> I cannot find a document about Assembly Language on the HP3000.
> >>>
> >>> The instruction set has a Procedure call and a Sub-routine call but I cannot find info
> >>> on what transpires in the CPU when they are executed.
> >> If the end use of a stack-based processor was a register-based language,
> >> what was the point? Elizabeth suggested users found it more convenient
> >> to run a PolyForth port on the GA144 than program it natively. Not sure
> >> if a dig but raises the question of creating something simply because one
> >> can. That it has become feasible to 'Build your own CPU' (or SBC, or
> >> Forth, or Standard) is no justification to do it. Hugh relates Testra
> >> was under competitive pressure to create their chip. As excuses go it's
> >> at least plausible.
> >
> > Why would anyone want to program even a stack processor in assembly language? While the GA144 may seem similar to Forth, it is actually very different. Like many assembly lanugages, it has many quirks at the assembly level that are easy to forget about and/or screw up. This is one of several reasons why I eschew the idea that a stack processor should be called a Forth processor.
> >
> > This is also why I would point out that the Testra processor was not a Forth processor. If I'm not mistaken, Hugh is happy to point out that the CPU was very hard to program at the assembly level and his compiler was very important to the chip being useful.
> >
> So a mismatch between what was wanted and what was available. Not a great
> recipe for performance but apparently good enough for their purposes.

I have no idea what you are talking about. Please find another way of stating your point.

--

Rick C.

+-- Get 1,000 miles of free Supercharging
+-- Tesla referral code - https://ts.la/richard11209

On Friday, August 11, 2023 at 10:55:22 PM UTC-4, dxforth wrote:

> If the end use of a stack-based processor was a register-based language,
> what was the point? Elizabeth suggested users found it more convenient
> to run a PolyForth port on the GA144 than program it natively. Not sure
> if a dig but raises the question of creating something simply because one
> can. That it has become feasible to 'Build your own CPU' (or SBC, or
> Forth, or Standard) is no justification to do it. Hugh relates Testra
> was under competitive pressure to create their chip. As excuses go it's
> at least plausible.

One could argue that the Algol language family is very stack oriented.
Where they differed from Chuck's approach was in trying to abstract the
hardware away from the programmer as far as possible.

Academia seems to favour that approach and I suppose by language
popularity so do the "masses" .

Hi folks.

How many stacks a machine has implicitly is how many stacks the instructions
use implicitly. On a 2 stack machine ret uses a stack implicitly, and + uses another
stack implicitly. Some of my sketches of CPUs have loops that know about thier
indicii uh, indexes stack, and @ ! and so on just know about a data pointer stack.

Rick Hohensee