On 23/08/2023 5:12 am, Lorem Ipsum wrote:
>
> Someone described the chip as Moore's toy.

I read somewhere he put in 50% of the money - making it mostly his to blow.
What the other investors think about it, is anyone's guess. Of Moore's chip
ventures only the Novix attracted attention of a major semiconductor firm.
Moore will be remembered primarily for his first venture - Forth - and fame
(infamy?) as an iconoclast. Even within Forth circles he comes across as
divisive, dismissing worshippers and critics alike.

On Wednesday, August 23, 2023 at 5:22:50 AM UTC+10, Lorem Ipsum wrote:
> On Tuesday, August 22, 2023 at 3:57:33 AM UTC-4, S wrote:
> > On Tuesday, August 22, 2023 at 5:16:02 AM UTC+10, Lorem Ipsum wrote:
> > > On Monday, August 21, 2023 at 3:02:58 PM UTC-4, S wrote:
> > > > On Tuesday, August 22, 2023 at 3:41:50 AM UTC+10, Lorem Ipsum wrote:
> > > > > On Monday, August 21, 2023 at 1:04:38 PM UTC-4, S wrote:
> > > > > > On Sunday, July 23, 2023 at 3:10:24 PM UTC+10, yeti wrote:
> > > > > > > Dave McGuire <mcg...@lssmuseum.org> writes:
>
...

> > You are paying any of us, or for patents. It's simple enough, give it a go yourself (or at least try to look up the posts I put some of it in 20 years ago).
> That's what I thought. You talk big, but actually have no idea.

Gass lighting again, and doing what you are accusing. You think you are so superior (Big) then you prove you can do it and have an idea?

...

> > The problem is, at least I figured out the logical architecture before I said anything.
> Sure, you have it all figured out. Good for you. Too bad you can't explain any of it.

Look up the previous posts, stop toying around.

> > That you don't have to try to use 700mips, and every cycle you use is more or less an minimal on actual work/communications, compared to everything both of us complain about in performance and programmability.
> Of course not. But you are talking about making the processors an order of magnitude faster, when the current speed can't be tapped. Why not try to solve the problems the chip actually has, before solving problems it doesn't have..

Another strange post. As usual, the person you are posting to doesn't really have the problem,
and the post confuses things. Your first sentence basically says by making the processor more efficient tapping all the speed, when the current speed can't be tapped, as some sort of non dependent problem as if it was a dependent problem. You see a new different design isn't an old design. The next sentence is more of it. You are basically saying the proposed solutions to solve the actual problems, as if they are not solving but trying to solve issues it doesn't have. This is like hemetic like confusing speak.

Glad you recovered somewhat from post COVID/V, you are writing well. I could have died last year

...
> > No, it's mainly just a few people pestering. You can't run investment or community projects with, pestering trying to deliberately distract people from it with pointless stuff, to shade and colour things.
> If you can't direct your attention to the things you want to get done, no, you will never get anywhere. Focus is 100% your issue, no one else'

Again, confusion speech. Here you have been trying to draw attention to yourself for a long time, away from others who are focusing, and are saying your actions are their fault. Maybe you should focus on your own business rather than focusing on getting into others' businesses? Everybody is tied of the confused speech. A lot of people with a full brain you get onto here, as if you are more. I think we are tied of it. You produce like 10x the talk. If you want to be significant, talk more exactly relevant sense, contribute some more useful contribution of design. If I saw somebody acting like that in the world place, in a design or authority position, I would very quickly determine how to transfer to a safer position or sack them. It doesn't get better when you do this. We are not going think you are great, a great designer, or a little deity. People are not even treating Chuck like that here. Somebody who has great contribution to the world, who you are disrespecting by saying the ga144 is just a grab bag of ideas thrown together with no prior experience/testing, like it's just bad etc etc etc. When you know this is meant to be a lowest denominator, lowest energy, spasmodic switching/performance device. Sure it might lot suit a lot of us because we want performance and straight forwardness. But, it perfectly fits what it was made for, and may still well have the lowest energy floor per processor of any processor doing light spasmodic processing, in the industry, over a decade latter. That this is a third generation of this type of device, after a few tested and proven generations at intelasys.

Thank you Rick Collins. How are things at Artemis, you were working on a new FPGA Misc design? Why don't you start a thread and talk about that. Sounds very interesting, well it would be to me, I take interest in a number of different things, and people.

>
> Rick C.
>
> ---+- Get 1,000 miles of free Supercharging
> ---+- Tesla referral code - https://ts.la/richard11209

On Wednesday, August 23, 2023 at 12:15:40 AM UTC-4, S wrote:
> On Wednesday, August 23, 2023 at 5:22:50 AM UTC+10, Lorem Ipsum wrote:
> > On Tuesday, August 22, 2023 at 3:57:33 AM UTC-4, S wrote:
> > > On Tuesday, August 22, 2023 at 5:16:02 AM UTC+10, Lorem Ipsum wrote:
> > > > On Monday, August 21, 2023 at 3:02:58 PM UTC-4, S wrote:
> > > > > On Tuesday, August 22, 2023 at 3:41:50 AM UTC+10, Lorem Ipsum wrote:
> > > > > > On Monday, August 21, 2023 at 1:04:38 PM UTC-4, S wrote:
> > > > > > > On Sunday, July 23, 2023 at 3:10:24 PM UTC+10, yeti wrote:
> > > > > > > > Dave McGuire <mcg...@lssmuseum.org> writes:
> >
> ..
> > > You are paying any of us, or for patents. It's simple enough, give it a go yourself (or at least try to look up the posts I put some of it in 20 years ago).
> > That's what I thought. You talk big, but actually have no idea.
> Gass lighting again, and doing what you are accusing. You think you are so superior (Big) then you prove you can do it and have an idea?

I've never said I could fix the GA144. In fact, I'm pretty confident it is fully broken and can't be fixed.

The Transputer CPUs are the only other ones I know of, that had anything like the GA144 communication connections. They were essentially serial connections, with a similar handshake to the GA144. That also did not catch on very much.

> > > The problem is, at least I figured out the logical architecture before I said anything.
> > Sure, you have it all figured out. Good for you. Too bad you can't explain any of it.
> Look up the previous posts, stop toying around.

I've read your posts, that's why I made the statement.

> > > That you don't have to try to use 700mips, and every cycle you use is more or less an minimal on actual work/communications, compared to everything both of us complain about in performance and programmability.
> > Of course not. But you are talking about making the processors an order of magnitude faster, when the current speed can't be tapped. Why not try to solve the problems the chip actually has, before solving problems it doesn't have..
>
> Another strange post. As usual, the person you are posting to doesn't really have the problem,
> and the post confuses things. Your first sentence basically says by making the processor more efficient tapping all the speed, when the current speed can't be tapped, as some sort of non dependent problem as if it was a dependent problem. You see a new different design isn't an old design. The next sentence is more of it. You are basically saying the proposed solutions to solve the actual problems, as if they are not solving but trying to solve issues it doesn't have. This is like hemetic like confusing speak.

Ok, if you say so. What I actually said, was that you talk about speeding up the CPUs dramatically, as if that would somehow be a significant inprovement, while ignoring the fact that the current GA144 can't utilize but a small fraction of the CPU speed for most applications. Instead of responding to that, you go off into the deep woods.

> Glad you recovered somewhat from post COVID/V, you are writing well. I could have died last year

That was true for any of us. The US lost over a million people to COVID. I essentially holed up compared to what I previously did. It was a bad time for everyone.

> > > No, it's mainly just a few people pestering. You can't run investment or community projects with, pestering trying to deliberately distract people from it with pointless stuff, to shade and colour things.
> > If you can't direct your attention to the things you want to get done, no, you will never get anywhere. Focus is 100% your issue, no one else'
> Again, confusion speech. Here you have been trying to draw attention to yourself for a long time, away from others who are focusing, and are saying your actions are their fault.

This is the sort of crap I'm talking about. I make a point and you go off on some tangent about me drawing attention to myself. I'm not talking about myself. I'm talking about YOU!

> Maybe you should focus on your own business rather than focusing on getting into others' businesses? Everybody is tied of the confused speech. A lot of people with a full brain you get onto here, as if you are more. I think we are tied of it. You produce like 10x the talk. If you want to be significant, talk more exactly relevant sense, contribute some more useful contribution of design. If I saw somebody acting like that in the world place, in a design or authority position, I would very quickly determine how to transfer to a safer position or sack them. It doesn't get better when you do this. We are not going think you are great, a great designer, or a little deity.

WTF are you talking about??? I'm willing to bet you write much more than I do in these posts.

> People are not even treating Chuck like that here. Somebody who has great contribution to the world, who you are disrespecting by saying the ga144 is just a grab bag of ideas thrown together with no prior experience/testing, like it's just bad etc etc etc.

So, I'm not allowed to express my opinion about the GA144 unless I think it's the greatest thing ever? The design of the chip speaks for itself. One of the last things Chuck did with the GA144 was to try to write code for a node that could pass traffic in two orthogonal directions at once. We never heard anything to indicate success. If the chip was any good, why is it even Chuck can't design with it?

> When you know this is meant to be a lowest denominator, lowest energy, spasmodic switching/performance device. Sure it might lot suit a lot of us because we want performance and straight forwardness. But, it perfectly fits what it was made for,

Which is what??? It was literally not designed for any purpose. The GA144 was a bunch of separate ideas that he threw onto one chip, with no intended market or application. There was word that someone wanted to use it for a hearing aid, but after a decade, still no word. No word on any actual application. GA has not even sold enough chips to require a second batch to be built.

That's a huge indicator!

> and may still well have the lowest energy floor per processor of any processor doing light spasmodic processing, in the industry, over a decade latter.

Which is a pointless metric by itself. If the chip is useful for no application, who cares how low power it is?

> That this is a third generation of this type of device, after a few tested and proven generations at intelasys.
>
> Thank you Rick Collins. How are things at Artemis, you were working on a new FPGA Misc design? Why don't you start a thread and talk about that. Sounds very interesting, well it would be to me, I take interest in a number of different things, and people.

I don't do MISC designs for no reason. I am currently working on a new design for a customer, including an FPGA, but no MCU. It's actually a port of an existing design to replace the obsolete FPGA and other chips. But, being property of a customer, I'm not at liberty to divulge the details.

I do use Forth on a PC to run a test fixture, but that's pretty basic. Nothing exciting there.

--

Rick C.

---++ Get 1,000 miles of free Supercharging
---++ Tesla referral code - https://ts.la/richard11209

On Wednesday, August 23, 2023 at 3:11:25 PM UTC+10, Lorem Ipsum wrote:
> On Wednesday, August 23, 2023 at 12:15:40 AM UTC-4, S wrote:
> > On Wednesday, August 23, 2023 at 5:22:50 AM UTC+10, Lorem Ipsum wrote:
> > > On Tuesday, August 22, 2023 at 3:57:33 AM UTC-4, S wrote:
> > > > On Tuesday, August 22, 2023 at 5:16:02 AM UTC+10, Lorem Ipsum wrote:
> > > > > On Monday, August 21, 2023 at 3:02:58 PM UTC-4, S wrote:
> > > > > > On Tuesday, August 22, 2023 at 3:41:50 AM UTC+10, Lorem Ipsum wrote:
> > > > > > > On Monday, August 21, 2023 at 1:04:38 PM UTC-4, S wrote:
> > > > > > > > On Sunday, July 23, 2023 at 3:10:24 PM UTC+10, yeti wrote:
> > > > > > > > > Dave McGuire <mcg...@lssmuseum.org> writes:
> > >
...
> > Gass lighting again, and doing what you are accusing. You think you are so superior (Big) then you prove you can do it and have an idea?
> I've never said I could fix the GA144. In fact, I'm pretty confident it is fully broken and can't be fixed.

Merry go around again. You design these things for a living, you should be able to easily suggest changes to the conceptual architecture to "fix" it, of it had been broken, as it does what it was designed to do, or "improve" it more to our liking.

...
> The Transputer CPUs are the only other ones I know of, that had anything like the GA144 communication connections. They were essentially serial connections, with a similar

I had suggested they change that to a parallel connection. I thought they had announced talked about that.

> handshake to the GA144. That also did not catch on very much.

So, you don't support butted processor to processor parallel ports, and changing the hand shaking environment? That's what I proposed.

> I've read your posts, that's why I made the statement

Sorry, accidentally deleted saying you should check my previous posts on it, where the truth is, and you acting like you missed it. Merry go around.

I'm more likely to share the more than basic details with GA, than you.

...

> > > > That you don't have to try to use 700mips, and every cycle you use is more or less an minimal on actual work/communications, compared to everything both of us complain about in performance and programmability.

...

> Ok, if you say so. What I actually said, was that you talk about speeding up the CPUs dramatically, as if that would somehow be a significant inprovement, while ignoring the fact that the current GA144 can't utilize but a small fraction of the CPU speed for most applications. Instead of responding to that, you go off into the deep woods.

Where did I say that speeding up the processor was a general solution, you lost me in those woods? It might help with external memory access and acquisition, but not much of an improvement. I did talk about redesigning the architecture as a major improvement in performance, then you can afd speed, which the redesign could handle, which is a seperate issue. Maybe you should just open source all your military designs, you like trying to get others to spill their IP, but what about giving your IP away for free, instead. Why don't you publish some genuine practical architectural improvements to the state of art? I don't know if I ever have seen you safely suggest an improvement in the last 20 years.

> > Glad you recovered somewhat from post COVID/V, you are writing well. I could have died last year
> That was true for any of us. The US lost over a million people to COVID. I essentially holed up compared to what I previously did. It was a bad time for everyone.

It's spike protein, which some V had more of them than some infections, induced a host of problems (around 27 or 37 were being investigated, the last I read) including vascular ischemia in the brain, which I already had after long term tick born disease, on top of a number of other previously bad things. So, no, I'm one of the ones that would have died, if I hadn't fought everything down. But, I can recognise the symptoms, I see them in Washington all the time. People have to hang on tight.to rationality. To slow down and think everything through, and all aspects. Most people can't do that, especially the last one, which was a vital.

...

> > Again, confusion speech. Here you have been trying to draw attention to yourself for a long time, away from others who are focusing, and are saying your actions are their fault.
> This is the sort of crap I'm talking about. I make a point and you go off on some tangent about me drawing attention to myself. I'm not talking about myself. I'm talking about YOU!

You normally go on and grand stand against various people being positive, that's the ... I'm addressing. I'm more worried about other people than lurking around doing that sort of thing about what others are doing.

> > Maybe you should focus on your own business rather than focusing on getting into others' businesses? Everybody is tied of the confused speech. A lot of people with a full brain you get onto here, as if you are more. I think we are tied of it. You produce like 10x the talk. If you want to be significant, talk more exactly relevant sense, contribute some more useful contribution of design. If I saw somebody acting like that in the world place, in a design or authority position, I would very quickly determine how to transfer to a safer position or sack them. It doesn't get better when you do this. We are not going think you are great, a great designer, or a little deity.
> WTF are you talking about??? I'm willing to bet you write much more than I do in these posts.

Merry go around again. How do you off tangent avoid what's said and make a confusing statement of blame? You keep coming into other people's discussions, saying stuff, so they have to address you, producing a number of times more discussion which would never happen without you, and anybody like that, there.
> > People are not even treating Chuck like that here. Somebody who has great contribution to the world, who you are disrespecting by saying the ga144 is just a grab bag of ideas thrown together with no prior experience/testing, like it's just bad etc etc etc.
> So, I'm not allowed to express my opinion about the GA144 unless I think it's the greatest thing ever? The design of the chip speaks for itself. One of the last things Chuck did with the GA144 was to try to write code for a node that could pass traffic in two orthogonal directions at once. We never heard anything to indicate success. If the chip was any good, why is it even Chuck can't design with it?

Confusion again. We don't know what Chuck did, and you are going off on a tangential. It's never that your are against the chip, though it is about what you are negative about and how far you can go, but it's a lot to do with hanging around people and what you say. You know the chip doesn't suite my needs either, and I often have the very same issues as you, but, I see solutions.

The issue with GA, is that there is no money to do an improved chip for us, but how much would it cost to transfer a new redesign onto those old Swiss watch fabs, and do a wafer of chips. They can design a two way point to point non locking parallel communications scheme, external psram execute and data/IO pin bus on a core, and serial psram execute and data bus with address auto decode shift register on various externally cores, with internal chip package SRAM/psram and flash mount buses to issue designs of various memory sizes, and a way to drive audio graphics and USB 2/3, BT and WiFi off chip. Even without the extra consumer level IO, most of people's problems would just go "poof" and you could use it for something. No hard to use IO, with auto drop and transmit streaming to the next processor, or any processor, high speed large memory execute access, high and low speed IO (I forgot, the external cores to also have auto shifters). It's only a few light weight modifications, and the consumer interfaces are basically mostly handled by the IO systems just mentioned and software that can be done at some future stage. It also provides a core for a low pin count serial execute external memory version. That's maybe three processor design, with the main difference being the IO section. You could even do the design such that you can expand the lines to variable lengths, making 32 bits simpler. Which means that two or so of the processor can be replaced by a larger simple 32 bit design that manages the external execute bus. Plus, design for dual speed (low energy and higher speed modes). This allows for multiple different types of programming implementations.

Thinking about that, it occurs to me that all sides of a processor could be a strip of shared Memory Share Buffer MSB. You could put data and return stacks into such sections too. But, if we treat the communications as a shared memory region, we can push data onto it, the other side takes data out, evening up flow. You can use pass and wait mode, pass and buffer mode, pass to address mode. Now, if you put the memory on only two sides, the storage sides can connect to the bare sides of surround processors, which shares it. This makes some interesting chip configuration dynamics. You can have the memory exposed along two sides of the chip, and as a memory bus. You can put multiple dies butted up. You can have the last two levels on the two sides have twice as much memory. But, you can have each row, or column alternate the direction of the outside memory, producing memory access on opposite sides of the chip. Anyway, with all the memory in strips going from core to core in rows and columns, they butt up against each other, and can form row and column shared memory, where they can be loaded up from column or row external processor head with data to process. Looking at it further, it's actually a grid of universally addressable memory, with the ability to pass messages diagonally through the 4 way butted memory. We are looking at processing wrong, it's about the memory data, with pools of local processing in. Interesting workflow. You can literally feed data through the memory space with surrounding processors picking it up and servicing it.. Every 32 bit core would be 4x32 bits of buss actually 12x32 bit. That's 1-3 or 6-12(corner double or two processor configurations) which would be mountains of data input.

On Monday, August 28, 2023 at 6:54:43 AM UTC-4, S wrote:
> On Wednesday, August 23, 2023 at 3:11:25 PM UTC+10, Lorem Ipsum wrote:
> > On Wednesday, August 23, 2023 at 12:15:40 AM UTC-4, S wrote:
> > > On Wednesday, August 23, 2023 at 5:22:50 AM UTC+10, Lorem Ipsum wrote:
> > > > On Tuesday, August 22, 2023 at 3:57:33 AM UTC-4, S wrote:
> > > > > On Tuesday, August 22, 2023 at 5:16:02 AM UTC+10, Lorem Ipsum wrote:
> > > > > > On Monday, August 21, 2023 at 3:02:58 PM UTC-4, S wrote:
> > > > > > > On Tuesday, August 22, 2023 at 3:41:50 AM UTC+10, Lorem Ipsum wrote:
> > > > > > > > On Monday, August 21, 2023 at 1:04:38 PM UTC-4, S wrote:
> > > > > > > > > On Sunday, July 23, 2023 at 3:10:24 PM UTC+10, yeti wrote:
> > > > > > > > > > Dave McGuire <mcg...@lssmuseum.org> writes:
> > > >
> ..
> > > Gass lighting again, and doing what you are accusing. You think you are so superior (Big) then you prove you can do it and have an idea?
> > I've never said I could fix the GA144. In fact, I'm pretty confident it is fully broken and can't be fixed.
> Merry go around again. You design these things for a living, you should be able to easily suggest changes to the conceptual architecture to "fix" it, of it had been broken, as it does what it was designed to do, or "improve" it more to our liking.

Your assumption is wrong. Personally, I think the design is fatally flawed and can not be "fixed". To be useful, multiprocessor designs require much more means of communications than simple neighbor connections can provide. I don't design multiprocessor designs, because I don't need billions of operations per second. If I do need very high performance processing, it would be for a specific application, and I would design custom processing for that in the FPGA.

> ..
> > The Transputer CPUs are the only other ones I know of, that had anything like the GA144 communication connections. They were essentially serial connections, with a similar
> I had suggested they change that to a parallel connection. I thought they had announced talked about that.

Which has nothing to do with the issue of connectivity. The issue is not bandwidth, it's connections. Look up what a hypercube is. That is a structure that is useful for this. But, it still gets out of hand as the numbers of processors goes up. The real estate goes up ***HUGELY***. It's not workable. The GA144 isn't the first multiprocessor design ever attempted.

> > handshake to the GA144. That also did not catch on very much.
> So, you don't support butted processor to processor parallel ports, and changing the hand shaking environment? That's what I proposed.

Let us know when you've run simulations, or built chips or at least done some calculations to show how well it would work.

> > I've read your posts, that's why I made the statement
> Sorry, accidentally deleted saying you should check my previous posts on it, where the truth is, and you acting like you missed it. Merry go around.
>
> I'm more likely to share the more than basic details with GA, than you.

Why are you talking to me at all? You virtually never like what I say. You claim I am a huge annoyance. Why bother?

> ..
> > > > > That you don't have to try to use 700mips, and every cycle you use is more or less an minimal on actual work/communications, compared to everything both of us complain about in performance and programmability.
> ..
> > Ok, if you say so. What I actually said, was that you talk about speeding up the CPUs dramatically, as if that would somehow be a significant inprovement, while ignoring the fact that the current GA144 can't utilize but a small fraction of the CPU speed for most applications. Instead of responding to that, you go off into the deep woods.
> Where did I say that speeding up the processor was a general solution, you lost me in those woods? It might help with external memory access and acquisition, but not much of an improvement.

Sorry if I didn't understand what you were/are talking about. Speeding the processor(s) in the GA144 will add nothing to the memory interface. It may speed it up a bit, but then the demand for data will also be increased and you have gained nothing.

> I did talk about redesigning the architecture as a major improvement in performance, then you can afd speed, which the redesign could handle, which is a seperate issue. Maybe you should just open source all your military designs,

LOL!!! I don't know what "afd speed" means. You can open source anything you want.

What "military" designs are you talking about? You seem to have gone off the deep end on this. When did I say anything about military designs?

> you like trying to get others to spill their IP, but what about giving your IP away for free, instead.

Why are you being a troll?

> Why don't you publish some genuine practical architectural improvements to the state of art? I don't know if I ever have seen you safely suggest an improvement in the last 20 years.

LOL

> > > Glad you recovered somewhat from post COVID/V, you are writing well. I could have died last year
> > That was true for any of us. The US lost over a million people to COVID.. I essentially holed up compared to what I previously did. It was a bad time for everyone.
> It's spike protein, which some V had more of them than some infections, induced a host of problems (around 27 or 37 were being investigated, the last I read) including vascular ischemia in the brain, which I already had after long term tick born disease, on top of a number of other previously bad things. So, no, I'm one of the ones that would have died, if I hadn't fought everything down. But, I can recognise the symptoms, I see them in Washington all the time. People have to hang on tight.to rationality. To slow down and think everything through, and all aspects. Most people can't do that, especially the last one, which was a vital.
>
> ..
> > > Again, confusion speech. Here you have been trying to draw attention to yourself for a long time, away from others who are focusing, and are saying your actions are their fault.
> > This is the sort of crap I'm talking about. I make a point and you go off on some tangent about me drawing attention to myself. I'm not talking about myself. I'm talking about YOU!
> You normally go on and grand stand against various people being positive, that's the ... I'm addressing. I'm more worried about other people than lurking around doing that sort of thing about what others are doing.
> > > Maybe you should focus on your own business rather than focusing on getting into others' businesses? Everybody is tied of the confused speech. A lot of people with a full brain you get onto here, as if you are more. I think we are tied of it. You produce like 10x the talk. If you want to be significant, talk more exactly relevant sense, contribute some more useful contribution of design. If I saw somebody acting like that in the world place, in a design or authority position, I would very quickly determine how to transfer to a safer position or sack them. It doesn't get better when you do this. We are not going think you are great, a great designer, or a little deity.
> > WTF are you talking about??? I'm willing to bet you write much more than I do in these posts.
> Merry go around again. How do you off tangent avoid what's said and make a confusing statement of blame? You keep coming into other people's discussions, saying stuff, so they have to address you, producing a number of times more discussion which would never happen without you, and anybody like that, there.
> > > People are not even treating Chuck like that here. Somebody who has great contribution to the world, who you are disrespecting by saying the ga144 is just a grab bag of ideas thrown together with no prior experience/testing, like it's just bad etc etc etc.
> > So, I'm not allowed to express my opinion about the GA144 unless I think it's the greatest thing ever? The design of the chip speaks for itself. One of the last things Chuck did with the GA144 was to try to write code for a node that could pass traffic in two orthogonal directions at once. We never heard anything to indicate success. If the chip was any good, why is it even Chuck can't design with it?
> Confusion again. We don't know what Chuck did, and you are going off on a tangential. It's never that your are against the chip, though it is about what you are negative about and how far you can go, but it's a lot to do with hanging around people and what you say. You know the chip doesn't suite my needs either, and I often have the very same issues as you, but, I see solutions.
>
> The issue with GA, is that there is no money to do an improved chip for us, but how much would it cost to transfer a new redesign onto those old Swiss watch fabs, and do a wafer of chips. They can design a two way point to point non locking parallel communications scheme, external psram execute and data/IO pin bus on a core, and serial psram execute and data bus with address auto decode shift register on various externally cores, with internal chip package SRAM/psram and flash mount buses to issue designs of various memory sizes, and a way to drive audio graphics and USB 2/3, BT and WiFi off chip. Even without the extra consumer level IO, most of people's problems would just go "poof" and you could use it for something. No hard to use IO, with auto drop and transmit streaming to the next processor, or any processor, high speed large memory execute access, high and low speed IO (I forgot, the external cores to also have auto shifters). It's only a few light weight modifications, and the consumer interfaces are basically mostly handled by the IO systems just mentioned and software that can be done at some future stage. It also provides a core for a low pin count serial execute external memory version. That's maybe three processor design, with the main difference being the IO section. You could even do the design such that you can expand the lines to variable lengths, making 32 bits simpler. Which means that two or so of the processor can be replaced by a larger simple 32 bit design that manages the external execute bus. Plus, design for dual speed (low energy and higher speed modes). This allows for multiple different types of programming implementations.
>
> Thinking about that, it occurs to me that all sides of a processor could be a strip of shared Memory Share Buffer MSB. You could put data and return stacks into such sections too. But, if we treat the communications as a shared memory region, we can push data onto it, the other side takes data out, evening up flow. You can use pass and wait mode, pass and buffer mode, pass to address mode. Now, if you put the memory on only two sides, the storage sides can connect to the bare sides of surround processors, which shares it. This makes some interesting chip configuration dynamics. You can have the memory exposed along two sides of the chip, and as a memory bus. You can put multiple dies butted up. You can have the last two levels on the two sides have twice as much memory. But, you can have each row, or column alternate the direction of the outside memory, producing memory access on opposite sides of the chip. Anyway, with all the memory in strips going from core to core in rows and columns, they butt up against each other, and can form row and column shared memory, where they can be loaded up from column or row external processor head with data to process. Looking at it further, it's actually a grid of universally addressable memory, with the ability to pass messages diagonally through the 4 way butted memory. We are looking at processing wrong, it's about the memory data, with pools of local processing in. Interesting workflow. You can literally feed data through the memory space with surrounding processors picking it up and servicing it. Every 32 bit core would be 4x32 bits of buss actually 12x32 bit. That's 1-3 or 6-12(corner double or two processor configurations) which would be mountains of data input.
>
> Anyway.
> > > When you know this is meant to be a lowest denominator, lowest energy, spasmodic switching/performance device. Sure it might lot suit a lot of us because we want performance and straight forwardness. But, it perfectly fits what it was made for,
> > Which is what??? It was literally not designed for any purpose. The GA144 was a bunch of separate ideas that he threw onto one chip, with no intended market or application. There was word that someone wanted to use it for a hearing aid, but after a decade, still no word. No word on any actual application. GA has not even sold enough chips to require a second batch to be built.
> You know how much it costs just to pay to keep the doors open and wages, without producing an unordered chip. The type of application was already answered. Is it their problem, if you want to do different applications? You also know this is based on previous generations of this sort of device, it is not a "random" collection of ideas.
> ..
> > > and may still well have the lowest energy floor per processor of any processor doing light spasmodic processing, in the industry, over a decade latter.
> ..
> > > That this is a third generation of this type of device, after a few tested and proven generations at intelasys.
>
>
> > > Thank you Rick Collins. How are things at Artemis, you were working on a new FPGA Misc design? Why don't you start a thread and talk about that. Sounds very interesting, well it would be to me, I take interest in a number of different things, and people.
> > I don't do MISC designs for no reason. I am currently working on a new design for a customer, including an FPGA, but no MCU. It's actually a port of an existing design to replace
> > the obsolete FPGA and other chips. But, being property of a customer, I'm not at liberty to divulge the details.
> You mean, just like GA is not going to reveal details and of their business with customers

On Tuesday, August 29, 2023 at 5:09:56 AM UTC+10, Lorem Ipsum wrote:
> On Monday, August 28, 2023 at 6:54:43 AM UTC-4, S wrote:
> > On Wednesday, August 23, 2023 at 3:11:25 PM UTC+10, Lorem Ipsum wrote:
> > > On Wednesday, August 23, 2023 at 12:15:40 AM UTC-4, S wrote:
> > > > On Wednesday, August 23, 2023 at 5:22:50 AM UTC+10, Lorem Ipsum wrote:
> > > > > On Tuesday, August 22, 2023 at 3:57:33 AM UTC-4, S wrote:
> > > > > > On Tuesday, August 22, 2023 at 5:16:02 AM UTC+10, Lorem Ipsum wrote:
> > > > > > > On Monday, August 21, 2023 at 3:02:58 PM UTC-4, S wrote:
> > > > > > > > On Tuesday, August 22, 2023 at 3:41:50 AM UTC+10, Lorem Ipsum wrote:
> > > > > > > > > On Monday, August 21, 2023 at 1:04:38 PM UTC-4, S wrote:
> > > > > > > > > > On Sunday, July 23, 2023 at 3:10:24 PM UTC+10, yeti wrote:
> > > > > > > > > > > Dave McGuire <mcg...@lssmuseum.org> writes:
> > > > >
> > ..
> > > > Gass lighting again, and doing what you are accusing. You think you are so superior (Big) then you prove you can do it and have an idea?
> > > I've never said I could fix the GA144. In fact, I'm pretty confident it is fully broken and can't be fixed.
> > Merry go around again. You design these things for a living, you should be able to easily suggest changes to the conceptual architecture to "fix" it, of it had been broken, as it does what it was designed to do, or "improve" it more to our liking.
> Your assumption is wrong. Personally, I think the design is fatally flawed and can not be "fixed". To be useful, multiprocessor designs require much more means of communications than simple neighbor connections can provide. I don't design multiprocessor designs, because I don't need billions of operations per second. If I do need very high performance processing, it would be for a specific application, and I would design custom processing for that in the FPGA.

Good on you, but I've explained many times not doing what you are accusing me of, and have direct node addressing and simple multiple busses that answer your concerns. I'm hardly going to make things the same to change them. But, I'm a lowly fool, what would I know.

> > ..
> > > The Transputer CPUs are the only other ones I know of, that had anything like the GA144 communication connections. They were essentially serial connections, with a similar
> > I had suggested they change that to a parallel connection. I thought they had announced talked about that.
> Which has nothing to do with the issue of connectivity. The issue is not bandwidth, it's connections. Look up what a hypercube is. That is a structure that is useful for this. But, it still gets out of hand as the numbers of processors goes up. The real estate goes up ***HUGELY***. It's not workable. The GA144 isn't the first multiprocessor design ever attempted

I did not realise, you don't design these systems. Well, it's simple, you program down to the capabilities of the hardware. For my graphics processing unit, I couldn't resolve the design to be as useful as I wanted due to bandwidth constraints. Higher bandwidth would definitely solve everything, especially to external memory, with direct execute. Simple example. I could outline an elaborate structure to use the resources passing the data along and inserting data as it goes, but I was practically better off if I did most of it with just one processing node from external memory with execute The problem is, that raises production costs. But, the modifications go beyond that into treating groups of processors as sections that pass and receive data wherever it is needed. Careful embedded programming means you avoid choking the data path. As is, the chip suites low energy data passing and modification applications, as long as you don't try to get too ambitious and do something else, you should be fine. But, except for my graphics processor, sound, maybe something to do with storage and laser vector projection, that's not really me. I want what most of you do, flexible access and use, but that's not what this chip was aiming for, very low-end stream processing alternative to fpga's, at lower energy and cost. The feature set modifications to make it more useful generally, are very simple.I have often said, to have at least one processor as normal, able to use the array for extra processing and IO. My non blocking IO structure would make using the array for random access or neighbour, a cinch. Lots of objections solved. If you want to go up a few levels to a hypercube, go and buy one. I know that emulation of hypercube at low energy and reasonable speed (bandwidth plus the messaging improvements), is probably better. It ultimately is cheaper with lower energy and cost per unit of performance. Most applications do not require a full hypercube design, so there is a market underneath hypercube systems, as we regularly use. My previous old way of dividing up the work space, for my own design, is very different than normal. But, you can't get much improvement if you don't change things. The stuff I'm proposing for the GA, is just simple feature improvements using low hanging fruit.

> > > handshake to the GA144. That also did not catch on very much.
> > So, you don't support butted processor to processor parallel ports, and changing the hand shaking environment? That's what I proposed.
> Let us know when you've run simulations, or built chips or at least done some calculations to show how well it would work.

What, you mean those things any truely intelligent person can do in their heads? Pity Cray and Tesla aren't still around.

> > > I've read your posts, that's why I made the statement
> > Sorry, accidentally deleted saying you should check my previous posts on it, where the truth is, and you acting like you missed it. Merry go around.
> >
> > I'm more likely to share the more than basic details with GA, than you.
> Why are you talking to me at all? You virtually never like what I say. You claim I am a huge annoyance. Why bother?

Why are you talking to me at all? You virtually never like what I say. You claim I am a huge annoyance. Why bother?

Why follow me around in my threads?

> > ..
> > > > > > That you don't have to try to use 700mips, and every cycle you use is more or less an minimal on actual work/communications, compared to everything both of us complain about in performance and programmability.
> > ..
> > > Ok, if you say so. What I actually said, was that you talk about speeding up the CPUs dramatically, as if that would somehow be a significant inprovement, while ignoring the fact that the current GA144 can't utilize but a small fraction of the CPU speed for most applications. Instead of responding to that, you go off into the deep woods.
> > Where did I say that speeding up the processor was a general solution, you lost me in those woods? It might help with external memory access and acquisition, but not much of an improvement.
> Sorry if I didn't understand what you were/are talking about. Speeding the processor(s) in the GA144 will add nothing to the memory interface. It may speed it up a bit, but then the demand for data will also be increased and you have gained nothing.

Thanks for the apology Rick. It's a bit like Rick Chanchez? ...with me sometimes.

The idea is to run more data and instructions from the external interface. Fur my sequential data application, like a massive pipeline, speed helps. But, it's those general purpose processing modifications I need most. If only they had 512 words of sram per data node too, or 256MWord each, I could do Nintendo GBA/SNES like tricks with some 3D too.

> > I did talk about redesigning the architecture as a major improvement in performance, then you can afd speed, which the redesign could handle, which is a seperate issue. Maybe you should just open source all your military designs,
> LOL!!! I don't know what "afd speed" means. You can open source anything you want.

You known what I meant. Open source, I was previously only aiming to open source certain things

>
> What "military" designs are you talking about? You seem to have gone off the deep end on this. When did I say anything about military designs?

You told us you get military contracts. Why waste time?

> > you like trying to get others to spill their IP, but what about giving your IP away for free, instead.
> Why are you being a troll?

Because I'm not, but you are often doing so. A troll acts stupid and makes mistakes, in order to bait a response. But does not realise, unless he does it anonymously, he just ruins his own reputation. You think I think highly of people trolling Huge, for instance? Nope, they are fooling themselves.. "What unethical conduct" and "Why ever hire somebody like that?", ethical employers might think.

....
> > > > That this is a third generation of this type of device, after a few tested and proven generations at intelasys.
> >
> >
> > > > Thank you Rick Collins. How are things at Artemis, you were working on a new FPGA Misc design? Why don't you start a thread and talk about that. Sounds very interesting, well it would be to me, I take interest in a number of different things, and people.
> > > I don't do MISC designs for no reason. I am currently working on a new design for a customer, including an FPGA, but no MCU. It's actually a port of an existing design to replace
> > > the obsolete FPGA and other chips. But, being property of a customer, I'm not at liberty to divulge the details.
> > You mean, just like GA is not going to reveal details and of their business with customers
> Nice talking to you.

On Wednesday, October 11, 2023 at 10:42:08 AM UTC-4, S wrote:
> On Tuesday, August 29, 2023 at 5:09:56 AM UTC+10, Lorem Ipsum wrote:
> > On Monday, August 28, 2023 at 6:54:43 AM UTC-4, S wrote:
> > > On Wednesday, August 23, 2023 at 3:11:25 PM UTC+10, Lorem Ipsum wrote:
> > > > On Wednesday, August 23, 2023 at 12:15:40 AM UTC-4, S wrote:
> > > > > On Wednesday, August 23, 2023 at 5:22:50 AM UTC+10, Lorem Ipsum wrote:
> > > > > > On Tuesday, August 22, 2023 at 3:57:33 AM UTC-4, S wrote:
> > > > > > > On Tuesday, August 22, 2023 at 5:16:02 AM UTC+10, Lorem Ipsum wrote:
> > > > > > > > On Monday, August 21, 2023 at 3:02:58 PM UTC-4, S wrote:
> > > > > > > > > On Tuesday, August 22, 2023 at 3:41:50 AM UTC+10, Lorem Ipsum wrote:
> > > > > > > > > > On Monday, August 21, 2023 at 1:04:38 PM UTC-4, S wrote:
> > > > > > > > > > > On Sunday, July 23, 2023 at 3:10:24 PM UTC+10, yeti wrote:
> > > > > > > > > > > > Dave McGuire <mcg...@lssmuseum.org> writes:
> > > > > >
> > > ..
> > > > > Gass lighting again, and doing what you are accusing. You think you are so superior (Big) then you prove you can do it and have an idea?
> > > > I've never said I could fix the GA144. In fact, I'm pretty confident it is fully broken and can't be fixed.
> > > Merry go around again. You design these things for a living, you should be able to easily suggest changes to the conceptual architecture to "fix" it, of it had been broken, as it does what it was designed to do, or "improve" it more to our liking.
> > Your assumption is wrong. Personally, I think the design is fatally flawed and can not be "fixed". To be useful, multiprocessor designs require much more means of communications than simple neighbor connections can provide. I don't design multiprocessor designs, because I don't need billions of operations per second. If I do need very high performance processing, it would be for a specific application, and I would design custom processing for that in the FPGA.
> Good on you, but I've explained many times not doing what you are accusing me of, and have direct node addressing and simple multiple busses that answer your concerns. I'm hardly going to make things the same to change them.. But, I'm a lowly fool, what would I know.

What have I accused" you of exactly?

This is one of the reasons it's difficult to discuss anything with you. You talk in very abstract terms, so that I can't tell what you are reffering to.

The "assumption" I say is wrong, is the idea that every problem can be "fixed". There are fundamental limitations to any issue.

> > > ..
> > > > The Transputer CPUs are the only other ones I know of, that had anything like the GA144 communication connections. They were essentially serial connections, with a similar
> > > I had suggested they change that to a parallel connection. I thought they had announced talked about that.
> > Which has nothing to do with the issue of connectivity. The issue is not bandwidth, it's connections. Look up what a hypercube is. That is a structure that is useful for this. But, it still gets out of hand as the numbers of processors goes up. The real estate goes up ***HUGELY***. It's not workable. The GA144 isn't the first multiprocessor design ever attempted
> I did not realise, you don't design these systems.

I don't design what systems???

> Well, it's simple, you program down to the capabilities of the hardware. For my graphics processing unit, I couldn't resolve the design to be as useful as I wanted due to bandwidth constraints. Higher bandwidth would definitely solve everything, especially to external memory, with direct execute. Simple example. I could outline an elaborate structure to use the resources passing the data along and inserting data as it goes, but I was practically better off if I did most of it with just one processing node from external memory with execute The problem is, that raises production costs. But, the modifications go beyond that into treating groups of processors as sections that pass and receive data wherever it is needed. Careful embedded programming means you avoid choking the data path. As is, the chip suites low energy data passing and modification applications, as long as you don't try to get too ambitious and do something else, you should be fine. But, except for my graphics processor, sound, maybe something to do with storage and laser vector projection, that's not really me. I want what most of you do, flexible access and use, but that's not what this chip was aiming for, very low-end stream processing alternative to fpga's, at lower energy and cost. The feature set modifications to make it more useful generally, are very simple.I have often said, to have at least one processor as normal, able to use the array for extra processing and IO. My non blocking IO structure would make using the array for random access or neighbour, a cinch. Lots of objections solved. If you want to go up a few levels to a hypercube, go and buy one. I know that emulation of hypercube at low energy and reasonable speed (bandwidth plus the messaging improvements), is probably better. It ultimately is cheaper with lower energy and cost per unit of performance. Most applications do not require a full hypercube design, so there is a market underneath hypercube systems, as we regularly use. My previous old way of dividing up the work space, for my own design, is very different than normal. But, you can't get much improvement if you don't change things. The stuff I'm proposing for the GA, is just simple feature improvements using low hanging fruit.

Once you have a design description of this, let me know. I would be interested in funding an approach. But, it would require a clear, solid design approach.

> > > > handshake to the GA144. That also did not catch on very much.
> > > So, you don't support butted processor to processor parallel ports, and changing the hand shaking environment? That's what I proposed.
> > Let us know when you've run simulations, or built chips or at least done some calculations to show how well it would work.
> What, you mean those things any truely intelligent person can do in their heads? Pity Cray and Tesla aren't still around.

Yeah, it's funny, but the people who would use your designs would not understand anything you provide to explain the device.

> > > > I've read your posts, that's why I made the statement
> > > Sorry, accidentally deleted saying you should check my previous posts on it, where the truth is, and you acting like you missed it. Merry go around.
> > >
> > > I'm more likely to share the more than basic details with GA, than you.
> > Why are you talking to me at all? You virtually never like what I say. You claim I am a huge annoyance. Why bother?
>
> Why are you talking to me at all? You virtually never like what I say. You claim I am a huge annoyance. Why bother?
> Why follow me around in my threads?

I thought we have conversations, but you seem to think of my comments as rude or attacks. Why do you respond to me at all? Do you have a mental condition that you can't ignore my comments?

Besides, this is not YOUR thread. This was started by someone else. So, if you don't like my replies, too bad.

> > > > > > > That you don't have to try to use 700mips, and every cycle you use is more or less an minimal on actual work/communications, compared to everything both of us complain about in performance and programmability.
> > > ..
> > > > Ok, if you say so. What I actually said, was that you talk about speeding up the CPUs dramatically, as if that would somehow be a significant inprovement, while ignoring the fact that the current GA144 can't utilize but a small fraction of the CPU speed for most applications. Instead of responding to that, you go off into the deep woods.
> > > Where did I say that speeding up the processor was a general solution, you lost me in those woods? It might help with external memory access and acquisition, but not much of an improvement.
> > Sorry if I didn't understand what you were/are talking about. Speeding the processor(s) in the GA144 will add nothing to the memory interface. It may speed it up a bit, but then the demand for data will also be increased and you have gained nothing.
> Thanks for the apology Rick. It's a bit like Rick Chanchez? ...with me sometimes.
>
> The idea is to run more data and instructions from the external interface.. Fur my sequential data application, like a massive pipeline, speed helps. But, it's those general purpose processing modifications I need most. If only they had 512 words of sram per data node too, or 256MWord each, I could do Nintendo GBA/SNES like tricks with some 3D too.

The external interface will always be limited by the external interface. That's a major limitation in every high speed computing device, the memory interface, or the I/O interface. Internal processing can be increased by increasing the number of processors. But, the ultimate limitation is either internal comms or external comms, because they can not keep up with the number of processors.

On Friday, July 21, 2023 at 5:24:26 AM UTC-4, none albert wrote:
> In article <2737c21a-be14-4af7...@googlegroups.com>,
> Lorem Ipsum <gnuarm.del...@gmail.com> wrote:
> >
> >The real issue, is the development software. It was not a product of a
> >single mind or even influence. It was a bit of a hodgepodge of various
> >software to handle various functions that may or may not be needed.
> Parallel processing: You couldn't configure a hypercube,not even a cube.
> We (Dutch Forth) did a demo program. Not only required this a patch from
> the seller the system software, in the next release the
> program no longer worked.
> Intriguing as the chip is, you're well advised to not waste any time
> with it.
>
> > Rick C.
>
> Groetjes Albert
> --
> Don't praise the day before the evening. One swallow doesn't make spring.
> You must not say "hey" before you have crossed the bridge. Don't sell the
> hide of the bear until you shot it. Better one bird in the hand than ten in
> the air. First gain is a cat spinning. - the Wise from Antrim -

--------------------
..well i'm stopping right here as further reading makes no sense ... my appology albert

..be honest here, not banging, but realization ... how many chips that chuck has developed 'on his own' have been successful? even one?
..why 144 processors made up of the very functional g18 instead of bringing that part forward?
..explain the actual benefit here ... ????? 144 processors that are not exactly standalone in nature ... yeah. in a serious power aware application how many processors would get used?
.. and why does the g144 need such heat sink? perhaps due to the fact the part is in fact basically analog in nature. no clock means that switches cascade and as that chain of switches engage everything along that path draws current. hmmmm. perhaps some clever clocking could lend repair. hybrid, you know, like here and not in there.

back on subject
..there was a g18 board and somewhere in all the hype the LED turned into a DED when thoughts of marketing happened.
..the g18 board was perfect to get your feet wet with the technology even tho it suffered the thru-put bandwidth issue its big sister continues to foist.
..the g18 had an excellent chance to compete with the m0 or strong-arm chip before every company started to load asics with it. every SOC is an asic. even zilog has a m0 part.
..i smell a huge lack of targeted application marketing here.
..the power usage comparisons to the msp430 16 bit processor line was kinda jokey as i have yet to see power usage while running an equivalent application comparison. ever?
..the original issue was that the required 1.8v voltage provision meant that the power circuit cost more in both price and board space than the processor, not viable against competition .. i requested they use the boot processor to switch over and become the 1.8v voltage controller making the parts price point land significantly below all the competition .. DED.

..the g144 will exit as a dead-end project as it cannot be generally applied to the mass market projects that are driving innovative products and the associated profits ... or it would be.
..guys, it's a really great shovel, look at that blade, sharp, quality steel, double folded kickplate .. but, um .. handle, where's the handle? and .. how do we attach it?
--------------------

..my match tossed onto the puddled gasoline
-C.Passauer, LogicWeavers

On Sunday, October 15, 2023 at 8:02:21 PM UTC-4, L W wrote:
> On Friday, July 21, 2023 at 5:24:26 AM UTC-4, none albert wrote:
> > In article <2737c21a-be14-4af7...@googlegroups.com>,
> > Lorem Ipsum <gnuarm.del...@gmail.com> wrote:
> > >
> > >The real issue, is the development software. It was not a product of a
> > >single mind or even influence. It was a bit of a hodgepodge of various
> > >software to handle various functions that may or may not be needed.
> > Parallel processing: You couldn't configure a hypercube,not even a cube..
> > We (Dutch Forth) did a demo program. Not only required this a patch from
> > the seller the system software, in the next release the
> > program no longer worked.
> > Intriguing as the chip is, you're well advised to not waste any time
> > with it.
> >
> > > Rick C.
> >
> > Groetjes Albert
> > --
> > Don't praise the day before the evening. One swallow doesn't make spring.
> > You must not say "hey" before you have crossed the bridge. Don't sell the
> > hide of the bear until you shot it. Better one bird in the hand than ten in
> > the air. First gain is a cat spinning. - the Wise from Antrim -
> --------------------
> .well i'm stopping right here as further reading makes no sense ... my appology albert
>
> .be honest here, not banging, but realization ... how many chips that chuck has developed 'on his own' have been successful? even one?
> .why 144 processors made up of the very functional g18 instead of bringing that part forward?
> .explain the actual benefit here ... ????? 144 processors that are not exactly standalone in nature ... yeah. in a serious power aware application how many processors would get used?

Ahhh... Same stuff, different day. What is a "power aware application"??? I've never seen this term used anywhere before. Even in power supply design.

The point of the GA144 was to provide processors cheaply, so they can be used like the logic modules of an FPGA. The main problem is the chip does not have anything remotely like the interconnectivity of fPGAs.

The GA144 was an assemblage of many different ideas, without giving much thought as to how they might be used together. So, we have very fast processing nodes with very tiny memories, interconnected by very fast comms, but only to the nearest neighbors. They provided a great way to stop a CPU, without giving though to actually communicating with other CPUs that are not next door.

Chuck used to publish a web page where he would report the results of his trial efforts with programming the device. One of the last reports was about solving this communications limitation by means of a comms node, connecting north to south and east to west bidirectionally. I don't recall ever seeing a successful result. This was at a point where Chuck was no longer interested in commercial success and he was not visibly working with Green Arrays.

Every few years, we hear word of some new design or a new contract, then nothing. It would appear they've never even produced a second batch of chips.. The original batch was a size which was likely the prototype run.

> . and why does the g144 need such heat sink? perhaps due to the fact the part is in fact basically analog in nature. no clock means that switches cascade and as that chain of switches engage everything along that path draws current. hmmmm. perhaps some clever clocking could lend repair. hybrid, you know, like here and not in there.

No, that's not a problem. It needs a heat sink because when all the nodes are running at full speed, it uses some handful of watts, which will overheat a chip of that size. I don't believe it needs a fan as such, but the heat sink is needed to provide better contact with the air.

> back on subject
> .there was a g18 board and somewhere in all the hype the LED turned into a DED when thoughts of marketing happened.
> .the g18 board was perfect to get your feet wet with the technology even tho it suffered the thru-put bandwidth issue its big sister continues to foist.
> .the g18 had an excellent chance to compete with the m0 or strong-arm chip before every company started to load asics with it. every SOC is an asic. even zilog has a m0 part.
> .i smell a huge lack of targeted application marketing here.

LOL!!! Green Array does no marketing. They do very little in the way of application work as well. The real problem is, they can't tell anyone how to design with the chip. There are no rules. It's just chaos, really.

> .the power usage comparisons to the msp430 16 bit processor line was kinda jokey as i have yet to see power usage while running an equivalent application comparison. ever?

Not sure what you are saying. When you compare one processor to an MSP430, it's much smaller for the amount of instructions processed. The max power, of course, is much higher because of the peak 700 MIPS throughput. The chip power consumption is much higher yet. I don't know what you are comparing.

> .the original issue was that the required 1.8v voltage provision meant that the power circuit cost more in both price and board space than the processor, not viable against competition .. i requested they use the boot processor to switch over and become the 1.8v voltage controller making the parts price point land significantly below all the competition .. DED.

A 1.8V power regulator is very, very inexpensive. If you insist it is a switching regulator, you don't gain so much. The switcher will likely be 90% efficient and the linear regulator 55% efficient. At these power levels and the much higher efficiency of the GA144, there's no point in worrying with a switcher.

> .the g144 will exit as a dead-end project as it cannot be generally applied to the mass market projects that are driving innovative products and the associated profits ... or it would be.

That's absolutely true, because the GA144 was never designed for any particular product category. It was a test bed for some of Chucks more recent ideas... his more final ideas, since not much has been announced by him since the GA144.

> .guys, it's a really great shovel, look at that blade, sharp, quality steel, double folded kickplate .. but, um .. handle, where's the handle? and ... how do we attach it?

Yes, if you had done much research here, you would have figured that out very quickly.

--

Rick C.

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> On Thu, 12 Oct 2023, 11:18 Lorem Ipsum, <gnuarm.deletethisbit@gmail.com> wrote:
> > On Wednesday, October 11, 2023 at 10:42:08 AM UTC-4, S wrote:
> > On Tuesday, August 29, 2023 at 5:09:56 AM UTC+10, Lorem Ipsum wrote:
> > > On Monday, August 28, 2023 at 6:54:43 AM UTC-4, S wrote:
> > > > On Wednesday, August 23, 2023 at 3:11:25 PM UTC+10, Lorem Ipsum wrote:
> > > > > On Wednesday, August 23, 2023 at 12:15:40 AM UTC-4, S wrote:
> > > > > > On Wednesday, August 23, 2023 at 5:22:50 AM UTC+10, Lorem Ipsum wrote:
> > > > > > > On Tuesday, August 22, 2023 at 3:57:33 AM UTC-4, S wrote:
> > > > > > > > On Tuesday, August 22, 2023 at 5:16:02 AM UTC+10, Lorem Ipsum wrote:
> > > > > > > > > On Monday, August 21, 2023 at 3:02:58 PM UTC-4, S wrote:
> > > > > > > > > > On Tuesday, August 22, 2023 at 3:41:50 AM UTC+10, Lorem Ipsum wrote:
> > > > > > > > > > > On Monday, August 21, 2023 at 1:04:38 PM UTC-4, S wrote:
> > > > > > > > > > > > On Sunday, July 23, 2023 at 3:10:24 PM UTC+10, yeti wrote:
> > > > > > > > > > > > > Dave McGuire <mcg...@lssmuseum.org> writes:
...

> > > > Your assumption is wrong. Personally, I think the design is fatally flawed and can not be "fixed". To be useful, multiprocessor designs require much more means of communications than simple neighbor connections can provide. I don't design multiprocessor designs, because I don't need billions of operations per second. If I do need very high performance processing, it would be for a specific application, and I would design custom processing for that in the FPGA.
> > Good on you, but I've explained many times not doing what you are accusing me of, and have direct node addressing and simple multiple busses that answer your concerns. I'm hardly going to make things the same to change them. But, I'm a lowly fool, what would I know.

> What have I accused" you of exactly?

?? You just did it again. Accuse me of accusing you of accusing me about something you say you aren't accusing me of again, but are (accusing). So confusing!

Of course it's accusing me of wanting to increase speed and not enhance the architecture past complex simple neighbour to neighbour come protocol.

> This is one of the reasons it's difficult to discuss anything with you. You talk in very abstract terms, so that I can't tell what you are reffering to.

It's called intelligence. I see what is happening, you can't keep up with the level of abstraction intelligence. That's the level of intelligence you need to really understand design improvements, well design. It's pointless trying to point out things to people without that. Without that you can't really understand what is more right. It's true like tyr bird who flies over the moon in its imagination, be sure it sees it's far and flies far and comes down again. All the other birds with it, think it's great he flew over the moon. Mean while the bird in the tree from another direction says he didn't fly over the moon, he just went upon the air. The birds sharing the delusion can not understand this, and say the wise bird in the tree is wrong. And the bird in the tree says, then how can they understand his design for a plane.

> The "assumption" I say is wrong, is the idea that every problem can be "fixed". There are fundamental limitations to any issue.

Which is wrong here.

> > >> > ..
> > > > > The Transputer CPUs are the only other ones I know of, that had anything like the GA144 communication connections. They were essentially serial connections, with a similar
> > >> > I had suggested they change that to a parallel connection. I thought they had announced talked about that.
> >> > Which has nothing to do with the issue of connectivity. The issue is not bandwidth, it's connections. Look up what a hypercube is. That is a structure that is useful for this. But, it still gets out of hand as the numbers of processors goes up. The real estate goes up ***HUGELY***. It's not workable. The GA144 isn't the first multiprocessor design ever attempted
> >> I did not realise, you don't design these systems.

> I don't design what systems??

What you were saying you don't design before.

"I don't design multiprocessor designs, because"

> Well, it's simple, you program down to the capabilities of the hardware. For my graphics processing unit, I couldn't resolve the design to be as useful as I wanted due to bandwidth constraints. Higher bandwidth would definitely solve everything, especially to external memory, with direct execute. Simple example. I could outline an elaborate structure to use the resources passing the data along and inserting data as it goes, but I was practically better off if I did most of it with just one processing node from external memory with execute The problem is, that raises production costs. But, the modifications go beyond that into treating groups of processors as sections that pass and receive data wherever it is needed. Careful embedded programming means you avoid choking the data path. As is, the chip suites low energy data passing and modification applications, as long as you don't try to get too ambitious and do something else, you should be fine. But, except for my graphics processor, sound, maybe something to do with storage and laser vector projection, that's not really me. I want what most of you do, flexible access and use, but that's not what this chip was aiming for, very low-end stream processing alternative to fpga's, at lower energy and cost. The feature set modifications to make it more useful generally, are very simple.I have often said, to have at least one processor as normal, able to use the array for extra processing and IO. My non blocking IO structure would make using the array for random access or neighbour, a cinch. Lots of objections solved. If you want to go up a few levels to a hypercube, go and buy one. I know that emulation of hypercube at low energy and reasonable speed (bandwidth plus the messaging improvements), is probably better. It ultimately is cheaper with lower energy and cost per unit of performance. Most applications do not require a full hypercube design, so there is a market underneath hypercube systems, as we regularly use. My previous old way of dividing up the work space, for my own design, is very different than normal. But, you can't get much improvement if you don't change things. The stuff I'm proposing for the GA, is just simple feature improvements using low hanging fruit.

> Once you have a design description of this, let me know. I would be interested in funding an approach. But, it would require a clear, solid design approach.

Well thank you. If we had been more collaborative on approaches, I'm sure we could have done something. I'm looking at moving most of it all onto my home made chip alternative technology, then maybe out to Arduino and Pi like products and manufacturing. I have to see how well I can get that to work with partners. How many MHz, or if it's going be a (X)tz slow.

> > > > handshake to the GA144. That also did not catch on very much.
> > > > So, you don't support butted processor to processor parallel ports, and changing the hand shaking environment? That's what I proposed.
> > > Let us know when you've run simulations, or built chips or at least done some calculations to show how well it would work.
> > What, you mean those things any truely intelligent person can do in their heads? Pity Cray and Tesla aren't still around.

> Yeah, it's funny, but the people who would use your designs would not understand anything you provide to explain the device.

"Truely intelligent".

IP rules. What's provided is a valid increase in data rate exchange from reduced clock cycles, with no space wastage. In matter of fact my direct to neighbouring memory write buffering speeds things a biten more. You must realise, the answer to massive device performance killing interconnects is high speed data passage to destination, as this is lower performance, low energy alternative. I'm not expecting hypercube performance very easily. But the general and row volume and group buses allow high data passage alternatives to mass interconnects. You have to just program to the hardware model, so that you keep as much as possible to neighbours, then in row and column common bus, and between groups, if the application allows. As this then frees up the global row, column and group busses as much as possible to avoid conflicts. You will get additional communications delays than going directly on the global bus, but you view it as pipe lining, and your aim is lowest energy per unit of computation at a modest processing load, so it is ok. I could design a global to global distributed parallel system using different technologies. Which might be worth doing on a quantum level using the architecture I was planning for the descent system.

...

> > Why follow me around in my threads?

> I thought we have conversations, but you seem to think of my comments as rude or attacks. Why do you respond to me at all? Do you have a mental condition that you can't ignore my comments?